lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sun, 22 Sep 2019 13:38:05 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Kevin Cernekee <cernekee@...il.com>,
        devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
        DEVICE TREE BINDINGS),
        bcm-kernel-feedback-list@...adcom.com (open list:BROADCOM BMIPS MIPS
        ARCHITECTURE),
        linux-mips@...r.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE)
Subject: Re: [PATCH v2 5/5] irqchip/irq-bcm7038-l1: Support
 brcm,int-fwd-mask

On Fri, 13 Sep 2019 12:15:42 -0700
Florian Fainelli <f.fainelli@...il.com> wrote:

> On some specific chips like 7211 we need to leave some interrupts
> untouched/forwarded to the VPU which is another agent in the system
> making use of that interrupt controller hardware (goes to both ARM GIC
> and VPU L1 interrupt controller). Make that possible by using the
> existing brcm,int-fwd-mask property.
> 
> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
> ---
>  drivers/irqchip/irq-bcm7038-l1.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c
> index 0673a44bbdc2..811a34201dd4 100644
> --- a/drivers/irqchip/irq-bcm7038-l1.c
> +++ b/drivers/irqchip/irq-bcm7038-l1.c
> @@ -44,6 +44,7 @@ struct bcm7038_l1_chip {
>  	struct list_head	list;
>  	u32			wake_mask[MAX_WORDS];
>  #endif
> +	u32			irq_fwd_mask[MAX_WORDS];
>  	u8			affinity[MAX_WORDS * IRQS_PER_WORD];
>  };
>  
> @@ -265,6 +266,7 @@ static int __init bcm7038_l1_init_one(struct device_node *dn,
>  	resource_size_t sz;
>  	struct bcm7038_l1_cpu *cpu;
>  	unsigned int i, n_words, parent_irq;
> +	int ret;
>  
>  	if (of_address_to_resource(dn, idx, &res))
>  		return -EINVAL;
> @@ -278,6 +280,14 @@ static int __init bcm7038_l1_init_one(struct device_node *dn,
>  	else if (intc->n_words != n_words)
>  		return -EINVAL;
>  
> +	ret = of_property_read_u32_array(dn , "brcm,int-fwd-mask",

What is the exact meaning of "fwd"? Forward? FirmWare Dementia?

> +					 intc->irq_fwd_mask, n_words);
> +	if (ret != 0 && ret != -EINVAL) {
> +		/* property exists but has the wrong number of words */
> +		pr_err("invalid brcm,int-fwd-mask property\n");
> +		return -EINVAL;
> +	}
> +
>  	cpu = intc->cpus[idx] = kzalloc(sizeof(*cpu) + n_words * sizeof(u32),
>  					GFP_KERNEL);
>  	if (!cpu)
> @@ -288,8 +298,9 @@ static int __init bcm7038_l1_init_one(struct device_node *dn,
>  		return -ENOMEM;
>  
>  	for (i = 0; i < n_words; i++) {
> -		l1_writel(0xffffffff, cpu->map_base + reg_mask_set(intc, i));
> -		cpu->mask_cache[i] = 0xffffffff;
> +		l1_writel(0xffffffff & ~intc->irq_fwd_mask[i],
> +			  cpu->map_base + reg_mask_set(intc, i));
> +		cpu->mask_cache[i] = 0xffffffff & ~intc->irq_fwd_mask[i];

I seem to remember that (0xffffffff & whatever) == whatever, as long as
'whatever' is a 32bit quantity. So what it this for?

	M.
-- 
Without deviation from the norm, progress is not possible.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ