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Message-ID: <20190923082735.tzxyhvjlnztsxhsc@pengutronix.de>
Date: Mon, 23 Sep 2019 10:27:35 +0200
From: Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>
To: Rasmus Villemoes <linux@...musvillemoes.dk>
Cc: Thierry Reding <thierry.reding@...il.com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
devicetree@...r.kernel.org, linux-pwm@...r.kernel.org,
linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 3/4] pwm: mxs: add support for inverse polarity
On Mon, Sep 23, 2019 at 10:13:47AM +0200, Rasmus Villemoes wrote:
> If I'm reading of_pwm_xlate_with_flags() right, existing device trees
> that set #pwm-cells = 2 will continue to work.
>
> Signed-off-by: Rasmus Villemoes <linux@...musvillemoes.dk>
> ---
> drivers/pwm/pwm-mxs.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c
> index 284107784dad..c46697acaf11 100644
> --- a/drivers/pwm/pwm-mxs.c
> +++ b/drivers/pwm/pwm-mxs.c
> @@ -25,8 +25,11 @@
> #define PERIOD_PERIOD(p) ((p) & 0xffff)
> #define PERIOD_PERIOD_MAX 0x10000
> #define PERIOD_ACTIVE_HIGH (3 << 16)
> +#define PERIOD_ACTIVE_LOW (2 << 16)
> +#define PERIOD_INACTIVE_HIGH (3 << 18)
> #define PERIOD_INACTIVE_LOW (2 << 18)
> #define PERIOD_POLARITY_NORMAL (PERIOD_ACTIVE_HIGH | PERIOD_INACTIVE_LOW)
> +#define PERIOD_POLARITY_INVERSE (PERIOD_ACTIVE_LOW | PERIOD_INACTIVE_HIGH)
> #define PERIOD_CDIV(div) (((div) & 0x7) << 20)
> #define PERIOD_CDIV_MAX 8
>
> @@ -50,9 +53,7 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> unsigned int period_cycles, duty_cycles;
> unsigned long rate;
> unsigned long long c;
> -
> - if (state->polarity != PWM_POLARITY_NORMAL)
> - return -ENOTSUPP;
> + unsigned int pol_bits;
>
> rate = clk_get_rate(mxs->clk);
> while (1) {
> @@ -81,9 +82,12 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> return ret;
> }
>
> + pol_bits = state->polarity == PWM_POLARITY_NORMAL ?
> + PERIOD_POLARITY_NORMAL : PERIOD_POLARITY_INVERSE;
> +
> writel(duty_cycles << 16,
> mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
> - writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | PERIOD_CDIV(div),
> + writel(PERIOD_PERIOD(period_cycles) | pol_bits | PERIOD_CDIV(div),
When will this affect the output? Only on the next start of a period, or
immediatly? Can it happen that this results in a mixed output (i.e. a
period that has already the new duty cycle from the line above but not
the new polarity (or period)?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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