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Message-ID: <20190923161824.GD10192@arrakis.emea.arm.com>
Date: Mon, 23 Sep 2019 17:18:25 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: Jia He <justin.he@....com>
Cc: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>,
James Morse <james.morse@....com>,
Marc Zyngier <maz@...nel.org>,
Matthew Wilcox <willy@...radead.org>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mm@...ck.org, Suzuki Poulose <Suzuki.Poulose@....com>,
Punit Agrawal <punitagrawal@...il.com>,
Anshuman Khandual <anshuman.khandual@....com>,
Alex Van Brunt <avanbrunt@...dia.com>,
Robin Murphy <robin.murphy@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Morton <akpm@...ux-foundation.org>,
Jérôme Glisse <jglisse@...hat.com>,
Ralph Campbell <rcampbell@...dia.com>, hejianet@...il.com,
Kaly Xin <Kaly.Xin@....com>, nd@....com
Subject: Re: [PATCH v8 2/3] arm64: mm: implement arch_faults_on_old_pte() on
arm64
On Sat, Sep 21, 2019 at 09:50:53PM +0800, Jia He wrote:
> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> index e09760ece844..4a9939615e41 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -868,6 +868,18 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
> #define phys_to_ttbr(addr) (addr)
> #endif
>
> +/*
> + * On arm64 without hardware Access Flag, copying fromuser will fail because
^^^^^^^^
from user
> + * the pte is old and cannot be marked young. So we always end up with zeroed
> + * page after fork() + CoW for pfn mappings. we don't always have a
^^
We
> + * hardware-managed access flag on arm64.
> + */
> +static inline bool arch_faults_on_old_pte(void)
> +{
> + return !cpu_has_hw_af();
I saw an early incarnation of your patch having a
WARN_ON(preemptible()). I think we need this back just in case this
function will be used elsewhere in the future.
> +}
> +#define arch_faults_on_old_pte arch_faults_on_old_pte
Otherwise,
Reviewed-by: Catalin Marinas <catalin.marinas@....com>
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