linux-kernel - Re: [PATCH v2 11/11] powerpc/mm/book3s64/pgtable: Uses counting method to skip serializing

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <b72cb1db-c341-4963-1a8b-ae71fe936458@nvidia.com>
Date:   Mon, 23 Sep 2019 13:26:48 -0700
From:   John Hubbard <jhubbard@...dia.com>
To:     Leonardo Bras <leonardo@...ux.ibm.com>,
        <linuxppc-dev@...ts.ozlabs.org>, <linux-kernel@...r.kernel.org>,
        Linux-MM <linux-mm@...ck.org>
CC:     Dan Williams <dan.j.williams@...el.com>,
        Arnd Bergmann <arnd@...db.de>, Jason Gunthorpe <jgg@...pe.ca>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Mahesh Salgaonkar <mahesh@...ux.vnet.ibm.com>,
        YueHaibing <yuehaibing@...wei.com>,
        Nicholas Piggin <npiggin@...il.com>,
        "Mike Rapoport" <rppt@...ux.ibm.com>,
        Keith Busch <keith.busch@...el.com>,
        "Richard Fontana" <rfontana@...hat.com>,
        Paul Mackerras <paulus@...ba.org>,
        "Aneesh Kumar K.V" <aneesh.kumar@...ux.ibm.com>,
        Ganesh Goudar <ganeshgr@...ux.ibm.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ira Weiny <ira.weiny@...el.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        "Allison Randal" <allison@...utok.net>
Subject: Re: [PATCH v2 11/11] powerpc/mm/book3s64/pgtable: Uses counting
 method to skip serializing

On 9/23/19 1:23 PM, Leonardo Bras wrote:
> On Mon, 2019-09-23 at 12:58 -0700, John Hubbard wrote:
>>
>> CPU 0                            CPU 1
>> ------                         --------------
>>                                READ(pte) (re-ordered at run time)
>>                                atomic_inc(val) (no run-time memory barrier!)
>>                            
>> pmd_clear(pte)
>> if (val)
>>     run_on_all_cpus(): IPI
>>                                local_irq_disable() (also not a mem barrier)
>>
>>                                if(pte)
>>                                   walk page tables
> 
> Let me see if I can understand,
> On most patches, it would be:
> 
> CPU 0                            CPU 1
> ------				--------------
> 				ptep = __find_linux_pte  
> 				(re-ordered at run time)
> 				atomic_inc(val) 
> pmd_clear(pte)
> smp_mb()
> if (val)
>     run_on_all_cpus(): IPI
>                                local_irq_disable() 
> 
>                                if(ptep)
>                                   pte = *ptep;
> 
> Is that what you meant?
> 
> 

Yes.

thanks,
-- 
John Hubbard
NVIDIA