linux-kernel - RE: [RFC PATCH 0/4] Use 1st-level for DMA remapping in guest

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Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D19D58F4A3@SHSMSX104.ccr.corp.intel.com>
Date:   Wed, 25 Sep 2019 07:21:51 +0000
From:   "Tian, Kevin" <kevin.tian@...el.com>
To:     Peter Xu <peterx@...hat.com>, Lu Baolu <baolu.lu@...ux.intel.com>
CC:     "Raj, Ashok" <ashok.raj@...el.com>,
        Jacob Pan <jacob.jun.pan@...ux.intel.com>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "Kumar, Sanjay K" <sanjay.k.kumar@...el.com>,
        "Sun, Yi Y" <yi.y.sun@...el.com>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Alex Williamson <alex.williamson@...hat.com>,
        David Woodhouse <dwmw2@...radead.org>
Subject: RE: [RFC PATCH 0/4] Use 1st-level for DMA remapping in guest

> From: Peter Xu [mailto:peterx@...hat.com]
> Sent: Wednesday, September 25, 2019 2:57 PM
> 
> On Wed, Sep 25, 2019 at 10:48:32AM +0800, Lu Baolu wrote:
> > Hi Kevin,
> >
> > On 9/24/19 3:00 PM, Tian, Kevin wrote:
> > > > > >       '-----------'
> > > > > >       '-----------'
> > > > > >
> > > > > > This patch series only aims to achieve the first goal, a.k.a using
> > > first goal? then what are other goals? I didn't spot such information.
> > >
> >
> > The overall goal is to use IOMMU nested mode to avoid shadow page
> table
> > and VMEXIT when map an gIOVA. This includes below 4 steps (maybe not
> > accurate, but you could get the point.)
> >
> > 1) GIOVA mappings over 1st-level page table;
> > 2) binding vIOMMU 1st level page table to the pIOMMU;
> > 3) using pIOMMU second level for GPA->HPA translation;
> > 4) enable nested (a.k.a. dual stage) translation in host.
> >
> > This patch set aims to achieve 1).
> 
> Would it make sense to use 1st level even for bare-metal to replace
> the 2nd level?
> 
> What I'm thinking is the DPDK apps - they have MMU page table already
> there for the huge pages, then if they can use 1st level as the
> default device page table then it even does not need to map, because
> it can simply bind the process root page table pointer to the 1st
> level page root pointer of the device contexts that it uses.
> 

Then you need bear with possible page faults from using CPU page
table, while most devices don't support it today. 

Thanks
Kevin