lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20190925164616.GA14994@global.cadence.com>
Date:   Wed, 25 Sep 2019 17:46:18 +0100
From:   Piotr Sroka <piotrs@...ence.com>
To:     Kazuhiro Kasai <kasai.kazuhiro@...ionext.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Vignesh Raghavendra <vigneshr@...com>,
        Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        "Paul E. McKenney" <paulmck@...ux.ibm.com>,
        Boris Brezillon <boris.brezillon@...labora.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Paul Cercueil <paul@...pouillou.net>,
        Arnd Bergmann <arnd@...db.de>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Liang Yang <liang.yang@...ogic.com>,
        Anders Roxell <anders.roxell@...aro.org>,
        <linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>
Subject: Re: [v8 0/2] mtd: rawnand: Add Cadence NAND controller driver

The 09/25/2019 16:52, Piotr Sroka wrote:
>Driver for Cadence HPNFC NAND flash controller.
>
>HW DMA interface
>Page write and page read operations are executed in Command DMA mode.
>Commands are defined by DMA descriptors.
>In CDMA mode controller own DMA engine is used (Master DMA mode).
>Other operations defined by nand_op_instr are executed in "Generic" mode.
>In that mode data can be transferred only in by Slave DMA interface.
>Slave DMA interface can be connected directly to AXI or to an external
>DMA engine.

Please ignore that email. 

Thanks
Piotr

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ