linux-kernel - RE: [v4,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A

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Date:   Thu, 26 Sep 2019 09:58:09 +0000
From:   Biwen Li <biwen.li@....com>
To:     Biwen Li <biwen.li@....com>, Leo Li <leoyang.li@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        Ran Wang <ran.wang_1@....com>
CC:     "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [v4,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A

Hi all,
the linux patch depended by RCPM driver,FlexTimer driver and FlexTimer dts, need apply these patches as follows:

1. RCPM driver:

https://patchwork.kernel.org/series/162731/mbox/ (https://patchwork.kernel.org/patch/11105279/)

2. FlexTimer dts:

https://lore.kernel.org/patchwork/series/405653/mbox/ (https://lore.kernel.org/patchwork/patch/1112493/)

3. FlexTimer driver:

https://patchwork.ozlabs.org/series/124718/mbox/ (https://patchwork.ozlabs.org/patch/1145999/)

https://patchwork.ozlabs.org/series/126942/mbox/ (https://patchwork.ozlabs.org/patch/1152085/)

4. Adjust drivers/soc/fsl/Makefile:

   remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to resolve a compilation error

> Description:
> 	- Reading configuration register RCPM_IPPDEXPCR1
> 	  always return zero
> 
> Workaround:
> 	- Save register RCPM_IPPDEXPCR1's value to
> 	  register SCFG_SPARECR8.(uboot's psci also
> 	  need reading value from the register SCFG_SPARECR8
> 	  to set register RCPM_IPPDEXPCR1)
> 
> Impact:
> 	- FlexTimer module will cannot wakeup system in
> 	  deep sleep on SoC LS1021A
> 
> Signed-off-by: Biwen Li <biwen.li@....com>
> ---
> Change in v4:
> 	- rename property name
> 	  fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
> 
> Change in v3:
> 	- update commit message
> 	- rename property name
> 	  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> 
> Change in v2:
> 	- fix stype problems
> 
>  drivers/soc/fsl/rcpm.c | 33 +++++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..9a29c482fc2e 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
>  #include <linux/slab.h>
>  #include <linux/suspend.h>
>  #include <linux/kernel.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>
> 
>  #define RCPM_WAKEUP_CELL_MAX_SIZE	7
> 
> @@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
>  	struct rcpm		*rcpm;
>  	u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
>  	int i, ret, idx;
> +	struct regmap *scfg_addr_regmap = NULL;
> +	u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> +	u32 reg_value = 0;
> 
>  	rcpm = dev_get_drvdata(dev);
>  	if (!rcpm)
> @@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
>  					tmp |= value[i + 1];
>  					iowrite32be(tmp, rcpm->ippdexpcr_base + i * 4);
>  				}
> +				/* Workaround of errata A-008646 on SoC LS1021A:
> +				 * There is a bug of register ippdexpcr1.
> +				 * Reading configuration register RCPM_IPPDEXPCR1
> +				 * always return zero. So save ippdexpcr1's value
> +				 * to register SCFG_SPARECR8.And the value of
> +				 * ippdexpcr1 will be read from SCFG_SPARECR8.
> +				 */
> +				scfg_addr_regmap =
> syscon_regmap_lookup_by_phandle(np,
> +
> "fsl,ippdexpcr1-alt-addr");
> +				if (scfg_addr_regmap && (1 == i)) {
> +					if (of_property_read_u32_array(dev->of_node,
> +					    "fsl,ippdexpcr1-alt-addr",
> +					    reg_offset,
> +					    1 + sizeof(u64)/sizeof(u32))) {
> +						scfg_addr_regmap = NULL;
> +						continue;
> +					}
> +					/* Read value from register SCFG_SPARECR8 */
> +					regmap_read(scfg_addr_regmap,
> +						    (u32)(((u64)(reg_offset[1] << (sizeof(u32) *
> 8) |
> +						    reg_offset[2])) & 0xffffffff),
> +						    &reg_value);
> +					/* Write value to register SCFG_SPARECR8 */
> +					regmap_write(scfg_addr_regmap,
> +						     (u32)(((u64)(reg_offset[1] << (sizeof(u32) *
> 8) |
> +						     reg_offset[2])) & 0xffffffff),
> +						     tmp | reg_value);
> +				}
>  			}
>  		}
>  	} while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1