linux-kernel - [PATCH -next 1/4] dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer

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Date:   Thu, 26 Sep 2019 16:20:57 +0530
From:   Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
To:     vkoul@...nel.org, dan.j.williams@...el.com,
        michal.simek@...inx.com, nick.graumann@...il.com,
        andrea.merello@...il.com, appana.durga.rao@...inx.com,
        mcgrof@...nel.org
Cc:     dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
        Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
Subject: [PATCH -next 1/4] dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer

In AXI DMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. It fixes simple AXI DMA operation
mode using 64-bit addressing.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
---
 drivers/dma/xilinx/xilinx_dma.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index e7dc3c4..1fbe025 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1354,7 +1354,8 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan)
 					   node);
 		hw = &segment->hw;
 
-		xilinx_write(chan, XILINX_DMA_REG_SRCDSTADDR, hw->buf_addr);
+		xilinx_write(chan, XILINX_DMA_REG_SRCDSTADDR,
+			     xilinx_prep_dma_addr_t(hw->buf_addr));
 
 		/* Start the transfer */
 		dma_ctrl_write(chan, XILINX_DMA_REG_BTT,
-- 
1.7.1