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Message-ID: <20190927085359.GA19131@pi3>
Date: Fri, 27 Sep 2019 10:53:59 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Lukasz Luba <l.luba@...tner.samsung.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, b.zolnierkie@...sung.com,
kgene@...nel.org, mark.rutland@....com, cw00.choi@...sung.com,
kyungmin.park@...sung.com, m.szyprowski@...sung.com,
s.nawrocki@...sung.com, myungjoo.ham@...sung.com,
robh+dt@...nel.org, willy.mh.wolff.ml@...il.com
Subject: Re: [PATCH 1/3] ARM: dts: exynos: Add interrupt to DMC controller in
Exynos5422
On Wed, Sep 25, 2019 at 06:18:11PM +0200, Lukasz Luba wrote:
> Add interrupt to Dynamic Memory Controller in Exynos5422 and Odroid
> XU3-family boards. It will be used instead of devfreq polling mode
> governor. The interrupt is connected to performance counters private
> for DMC, which might track utilisation of the memory channels.
>
> Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
> ---
> arch/arm/boot/dts/exynos5420.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index ac49373baae7..72738e620d11 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -240,6 +240,8 @@
> dmc: memory-controller@...20000 {
> compatible = "samsung,exynos5422-dmc";
> reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
> + interrupt-parent = <&combiner>;
> + interrupts = <16 0>;
You register DMC for DREX0 and DREX1 but take only DREX0 interrupt. Why
skipping second?
Best regards,
Krzysztof
> clocks = <&clock CLK_FOUT_SPLL>,
> <&clock CLK_MOUT_SCLK_SPLL>,
> <&clock CLK_FF_DOUT_SPLL2>,
> --
> 2.17.1
>
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