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Message-Id: <1569553244-3165-1-git-send-email-zhangqing@rock-chips.com>
Date: Fri, 27 Sep 2019 11:00:39 +0800
From: Elaine Zhang <zhangqing@...k-chips.com>
To: heiko@...ech.de
Cc: mturquette@...libre.com, sboyd@...nel.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
xxx@...k-chips.com, xf@...k-chips.com, huangtao@...k-chips.com,
Elaine Zhang <zhangqing@...k-chips.com>
Subject: [PATCH v3 0/5] clk: rockchip: Support for some new features
1. Support for some new features
2. fix up some error
Chang in V3:
[PATCH v2 3/6] : It's been merged
So rebased and resubmit.
Chang in V2:
[PATCH v2 5/6] : fix up the Register error, and add delay.
Elaine Zhang (4):
clk: rockchip: fix up the frac clk get rate error
clk: rockchip: add a clock-type for muxes based in the pmugrf
clk: rockchip: add pll up and down when change pll freq
clk: rockchip: support pll setting by auto
Finley Xiao (1):
clk: rockchip: Add supprot to limit input rate for fractional divider
drivers/clk/rockchip/clk-pll.c | 236 +++++++++++++++++++++++++++++++++++---
drivers/clk/rockchip/clk-px30.c | 29 ++---
drivers/clk/rockchip/clk-rk3036.c | 13 ++-
drivers/clk/rockchip/clk-rk3128.c | 15 ++-
drivers/clk/rockchip/clk-rk3188.c | 24 ++--
drivers/clk/rockchip/clk-rk3228.c | 18 +--
drivers/clk/rockchip/clk-rk3288.c | 19 +--
drivers/clk/rockchip/clk-rk3308.c | 46 ++++----
drivers/clk/rockchip/clk-rk3328.c | 17 +--
drivers/clk/rockchip/clk-rk3368.c | 17 +--
drivers/clk/rockchip/clk-rk3399.c | 32 +++---
drivers/clk/rockchip/clk-rv1108.c | 14 ++-
drivers/clk/rockchip/clk.c | 39 ++++++-
drivers/clk/rockchip/clk.h | 27 ++++-
include/linux/clk-provider.h | 2 +
15 files changed, 422 insertions(+), 126 deletions(-)
--
1.9.1
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