linux-kernel - Re: [PATCH v6 6/7] arm64: dts: amlogic: g12b: add cooling properties

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Message-ID: <e57cd8d9-5174-bd1b-e091-98d6328f7891@baylibre.com>
Date:   Mon, 30 Sep 2019 10:19:41 +0200
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Guillaume La Roque <glaroque@...libre.com>,
        amit.kucheria@...aro.org, rui.zhang@...el.com, edubezval@...il.com,
        daniel.lezcano@...aro.org
Cc:     devicetree@...r.kernel.org, linux-amlogic@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-pm@...r.kernel.org
Subject: Re: [PATCH v6 6/7] arm64: dts: amlogic: g12b: add cooling properties

On 27/09/2019 20:43, Guillaume La Roque wrote:
> Add missing #colling-cells field for G12B SoC
> Add cooling-map for passive and hot trip point
> 
> Tested-by: Christian Hewitt <christianshewitt@...il.com>
> Tested-by: Kevin Hilman <khilman@...libre.com>
> Signed-off-by: Guillaume La Roque <glaroque@...libre.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 29 +++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> index 98ae8a7c8b41..4bb89bce758f 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> @@ -49,6 +49,7 @@
>  			reg = <0x0 0x0>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu1: cpu@1 {
> @@ -57,6 +58,7 @@
>  			reg = <0x0 0x1>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu100: cpu@100 {
> @@ -65,6 +67,7 @@
>  			reg = <0x0 0x100>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu101: cpu@101 {
> @@ -73,6 +76,7 @@
>  			reg = <0x0 0x101>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu102: cpu@102 {
> @@ -81,6 +85,7 @@
>  			reg = <0x0 0x102>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu103: cpu@103 {
> @@ -89,6 +94,7 @@
>  			reg = <0x0 0x103>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		l2: l2-cache0 {
> @@ -219,3 +225,26 @@
>  &sd_emmc_a {
>  	amlogic,dram-access-quirk;
>  };
> +
> +&cpu_thermal {
> +	cooling-maps {
> +		map0 {
> +			trip = <&cpu_passive>;
> +			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +		map1 {
> +			trip = <&cpu_hot>;
> +			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> 

Reviewed-by: Neil Armstrong <narmstrong@...libre.com>