[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <06e16f73-f6af-5019-3d85-bc33740e0c8f@linux.intel.com>
Date: Mon, 30 Sep 2019 12:17:57 -0400
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: acme@...nel.org, mingo@...hat.com, linux-kernel@...r.kernel.org,
tglx@...utronix.de, jolsa@...nel.org, eranian@...gle.com,
alexander.shishkin@...ux.intel.com, ak@...ux.intel.com
Subject: Re: [PATCH V4 07/14] perf/x86/intel: Support hardware TopDown metrics
On 9/30/2019 10:53 AM, Peter Zijlstra wrote:
>
> After that, I think we can simply do something like:
>
> icl_update_topdown_event(..)
We should call this function in x86_pmu_commit_txn()?
In intel_pmu_read_event(), we just simply return, when TXN_READ is set
and is_topdown_count().
If so, it looks like we need add a per-cpu variable to store the topdown
group events which user tries to read. Then we can update these events
in x86_pmu_commit_txn(). The same method as Power does.
Is my understanding correct?
> {
> int idx = event->hwc.idx;
>
> if (is_metric_idx(idx))
> return;
>
> // must be FIXED_SLOTS
The FIXED_SLOTS may not be in the group.
Thanks,
Kan
>
> /* do teh thing and update SLOTS and METRIC together */
> }
>
> Hmmm?
Powered by blists - more mailing lists