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Message-ID: <5d93ce88.1c69fb81.aec64.6b1b@mx.google.com>
Date: Tue, 01 Oct 2019 17:09:09 -0500
From: Rob Herring <robh@...nel.org>
To: Jianxin Pan <jianxin.pan@...ogic.com>
Cc: Kevin Hilman <khilman@...libre.com>,
linux-amlogic@...ts.infradead.org,
Zhiqiang Liang <zhiqiang.liang@...ogic.com>,
Neil Armstrong <narmstrong@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
Jian Hu <jian.hu@...ogic.com>,
Hanjie Lin <hanjie.lin@...ogic.com>,
Victor Wan <victor.wan@...ogic.com>,
Xingyu Chen <xingyu.chen@...ogic.com>
Subject: Re: [PATCH 1/3] dt-bindings: power: add Amlogic secure power domains
bindings
On Thu, Sep 19, 2019 at 08:11:02AM -0400, Jianxin Pan wrote:
> Add the bindings for the Amlogic Secure power domains, controlling the
> secure power domains.
>
> The bindings targets the Amlogic A1 and C1 compatible SoCs, in which the
> power domain registers are in secure world.
>
> Signed-off-by: Jianxin Pan <jianxin.pan@...ogic.com>
> Signed-off-by: Zhiqiang Liang <zhiqiang.liang@...ogic.com>
> ---
> .../bindings/power/amlogic,meson-sec-pwrc.yaml | 32 ++++++++++++++++++++++
> include/dt-bindings/power/meson-a1-power.h | 32 ++++++++++++++++++++++
> 2 files changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
> create mode 100644 include/dt-bindings/power/meson-a1-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
> new file mode 100644
> index 00000000..327e0d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
> @@ -0,0 +1,32 @@
> +# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +# Copyright (c) 2019 Amlogic, Inc
> +# Author: Jianxin Pan <jianxin.pan@...ogic.com>
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Amlogic Meson Secure Power Domains
> +
> +maintainers:
> + - Jianxin Pan <jianxin.pan@...ogic.com>
> +
> +description: |+
> + A1/C1 series The Secure Power Domains node should be the child of a syscon
> + node with the required property.
'a syscon node' is not specific enough. It must be a specific node.
> +
> +properties:
> + compatible:
> + enum:
> + - amlogic,meson-a1-pwrc
> +
> +required:
> + - compatible
> +
> +examples:
> + - |
> + pwrc: power-controller {
> + compatible = "amlogic,meson-a1-pwrc";
But why do you need this node? It has no resources.
#power-domain-cells needed?
> + };
> +
> +
> diff --git a/include/dt-bindings/power/meson-a1-power.h b/include/dt-bindings/power/meson-a1-power.h
> new file mode 100644
> index 00000000..6cf50bf
> --- /dev/null
> +++ b/include/dt-bindings/power/meson-a1-power.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
> +/*
> + * Copyright (c) 2019 Amlogic, Inc.
> + * Author: Jianxin Pan <jianxin.pan@...ogic.com>
> + */
> +
> +#ifndef _DT_BINDINGS_MESON_A1_POWER_H
> +#define _DT_BINDINGS_MESON_A1_POWER_H
> +
> +#define PWRC_DSPA_ID 8
> +#define PWRC_DSPB_ID 9
> +#define PWRC_UART_ID 10
> +#define PWRC_DMC_ID 11
> +#define PWRC_I2C_ID 12
> +#define PWRC_PSRAM_ID 13
> +#define PWRC_ACODEC_ID 14
> +#define PWRC_AUDIO_ID 15
> +#define PWRC_OTP_ID 16
> +#define PWRC_DMA_ID 17
> +#define PWRC_SD_EMMC_ID 18
> +#define PWRC_RAMA_ID 19
> +#define PWRC_RAMB_ID 20
> +#define PWRC_IR_ID 21
> +#define PWRC_SPICC_ID 22
> +#define PWRC_SPIFC_ID 23
> +#define PWRC_USB_ID 24
> +#define PWRC_NIC_ID 25
> +#define PWRC_PDMIN_ID 26
> +#define PWRC_RSA_ID 27
> +#define PWRC_MAX_ID 28
> +
> +#endif
> --
> 2.7.4
>
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