lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Tue, 1 Oct 2019 14:42:01 +0200
From:   Ard Biesheuvel <ard.biesheuvel@...aro.org>
To:     kbuild test robot <lkp@...el.com>,
        Herbert Xu <herbert@...dor.apana.org.au>
Cc:     kbuild-all@...org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: arch/arm/crypto/aes-ce-core.S:467: Error: selected processor does
 not support `movw ip,:lower16:.Lcts_permute_table' in ARM mode

On Tue, 1 Oct 2019 at 13:39, kbuild test robot <lkp@...el.com> wrote:
>
> Hi Ard,
>
> FYI, the error/warning still remains.

Should be fixed by

https://lore.kernel.org/linux-crypto/20190917085001.792-1-ard.biesheuvel@arm.com/

sent out ~2 weeks ago.


>
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head:   54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c
> commit: c61b1607ed4fbbf2ba7c86f29768cff44a1a88f8 crypto: arm/aes-ce - implement ciphertext stealing for XTS
> date:   3 weeks ago
> config: arm-allmodconfig (attached as .config)
> compiler: arm-linux-gnueabi-gcc (GCC) 7.4.0
> reproduce:
>         wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
>         chmod +x ~/bin/make.cross
>         git checkout c61b1607ed4fbbf2ba7c86f29768cff44a1a88f8
>         # save the attached .config to linux build tree
>         GCC_VERSION=7.4.0 make.cross ARCH=arm
>
> If you fix the issue, kindly add following tag
> Reported-by: kbuild test robot <lkp@...el.com>
>
> All errors (new ones prefixed by >>):
>
>    arch/arm/crypto/aes-ce-core.S: Assembler messages:
> >> arch/arm/crypto/aes-ce-core.S:467: Error: selected processor does not support `movw ip,:lower16:.Lcts_permute_table' in ARM mode
> >> arch/arm/crypto/aes-ce-core.S:468: Error: selected processor does not support `movt ip,:upper16:.Lcts_permute_table' in ARM mode
>    arch/arm/crypto/aes-ce-core.S:553: Error: selected processor does not support `movw ip,:lower16:.Lcts_permute_table' in ARM mode
>    arch/arm/crypto/aes-ce-core.S:554: Error: selected processor does not support `movt ip,:upper16:.Lcts_permute_table' in ARM mode
>
> vim +467 arch/arm/crypto/aes-ce-core.S
>
>    403
>    404  ENTRY(ce_aes_xts_encrypt)
>    405          push            {r4-r6, lr}
>    406
>    407          bl              ce_aes_xts_init         @ run shared prologue
>    408          prepare_key     r2, r3
>    409          vmov            q4, q0
>    410
>    411          teq             r6, #0                  @ start of a block?
>    412          bne             .Lxtsenc4x
>    413
>    414  .Lxtsencloop4x:
>    415          next_tweak      q4, q4, q15, q10
>    416  .Lxtsenc4x:
>    417          subs            r4, r4, #64
>    418          bmi             .Lxtsenc1x
>    419          vld1.8          {q0-q1}, [r1]!          @ get 4 pt blocks
>    420          vld1.8          {q2-q3}, [r1]!
>    421          next_tweak      q5, q4, q15, q10
>    422          veor            q0, q0, q4
>    423          next_tweak      q6, q5, q15, q10
>    424          veor            q1, q1, q5
>    425          next_tweak      q7, q6, q15, q10
>    426          veor            q2, q2, q6
>    427          veor            q3, q3, q7
>    428          bl              aes_encrypt_4x
>    429          veor            q0, q0, q4
>    430          veor            q1, q1, q5
>    431          veor            q2, q2, q6
>    432          veor            q3, q3, q7
>    433          vst1.8          {q0-q1}, [r0]!          @ write 4 ct blocks
>    434          vst1.8          {q2-q3}, [r0]!
>    435          vmov            q4, q7
>    436          teq             r4, #0
>    437          beq             .Lxtsencret
>    438          b               .Lxtsencloop4x
>    439  .Lxtsenc1x:
>    440          adds            r4, r4, #64
>    441          beq             .Lxtsencout
>    442          subs            r4, r4, #16
>    443          bmi             .LxtsencctsNx
>    444  .Lxtsencloop:
>    445          vld1.8          {q0}, [r1]!
>    446  .Lxtsencctsout:
>    447          veor            q0, q0, q4
>    448          bl              aes_encrypt
>    449          veor            q0, q0, q4
>    450          teq             r4, #0
>    451          beq             .Lxtsencout
>    452          subs            r4, r4, #16
>    453          next_tweak      q4, q4, q15, q6
>    454          bmi             .Lxtsenccts
>    455          vst1.8          {q0}, [r0]!
>    456          b               .Lxtsencloop
>    457  .Lxtsencout:
>    458          vst1.8          {q0}, [r0]
>    459  .Lxtsencret:
>    460          vst1.8          {q4}, [r5]
>    461          pop             {r4-r6, pc}
>    462
>    463  .LxtsencctsNx:
>    464          vmov            q0, q3
>    465          sub             r0, r0, #16
>    466  .Lxtsenccts:
>  > 467          movw            ip, :lower16:.Lcts_permute_table
>  > 468          movt            ip, :upper16:.Lcts_permute_table
>    469
>    470          add             r1, r1, r4              @ rewind input pointer
>    471          add             r4, r4, #16             @ # bytes in final block
>    472          add             lr, ip, #32
>    473          add             ip, ip, r4
>    474          sub             lr, lr, r4
>    475          add             r4, r0, r4              @ output address of final block
>    476
>    477          vld1.8          {q1}, [r1]              @ load final partial block
>    478          vld1.8          {q2}, [ip]
>    479          vld1.8          {q3}, [lr]
>    480
>    481          vtbl.8          d4, {d0-d1}, d4
>    482          vtbl.8          d5, {d0-d1}, d5
>    483          vtbx.8          d0, {d2-d3}, d6
>    484          vtbx.8          d1, {d2-d3}, d7
>    485
>    486          vst1.8          {q2}, [r4]              @ overlapping stores
>    487          mov             r4, #0
>    488          b               .Lxtsencctsout
>    489  ENDPROC(ce_aes_xts_encrypt)
>    490
>    491
>
> ---
> 0-DAY kernel test infrastructure                Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ