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Message-Id: <20191001125436.24086-4-l.luba@partner.samsung.com>
Date: Tue, 1 Oct 2019 14:54:35 +0200
From: Lukasz Luba <l.luba@...tner.samsung.com>
To: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org,
mark.rutland@....com, cw00.choi@...sung.com,
kyungmin.park@...sung.com, m.szyprowski@...sung.com,
s.nawrocki@...sung.com, myungjoo.ham@...sung.com,
robh+dt@...nel.org, willy.mh.wolff.ml@...il.com,
Lukasz Luba <l.luba@...tner.samsung.com>
Subject: [PATCH v2 3/4] ARM: dts: exynos: map 0x10000 SFR instead of 0x100
in DMC Exynos5422
There is a need to access registers at address offset near 0x10000.
These registers are private DMC performance counters, which might be used
as interrupt trigger when overflow. Potential usage is to skip polling
in devfreq framework and switch to interrupt managed bandwidth control.
Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
---
arch/arm/boot/dts/exynos5420.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 45f63cd82e56..ac6dc44dbe4d 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -239,7 +239,7 @@
dmc: memory-controller@...20000 {
compatible = "samsung,exynos5422-dmc";
- reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
+ reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>, <16 1>;
interrupt-names = "drex_0", "drex_1";
--
2.17.1
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