lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Tue, 1 Oct 2019 17:58:52 +0200
From:   Lukasz Luba <l.luba@...tner.samsung.com>
To:     Krzysztof Kozlowski <krzk@...nel.org>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, b.zolnierkie@...sung.com,
        kgene@...nel.org, mark.rutland@....com, cw00.choi@...sung.com,
        kyungmin.park@...sung.com, m.szyprowski@...sung.com,
        s.nawrocki@...sung.com, myungjoo.ham@...sung.com,
        robh+dt@...nel.org, willy.mh.wolff.ml@...il.com
Subject: Re: [PATCH v2 1/4] dt-bindings: memory-controllers: Add Exynos5422
 DMC interrupts description



On 10/1/19 3:18 PM, Krzysztof Kozlowski wrote:
> On Tue, Oct 01, 2019 at 02:54:33PM +0200, Lukasz Luba wrote:
>> Add description for optional interrupt lines. It provides a new operation
>> mode, which uses internal performance counters interrupt when overflow.
>> This is more reliable than using default polling mode implemented in
>> devfreq.
>>
>> Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
>> ---
>>   .../bindings/memory-controllers/exynos5422-dmc.txt     | 10 ++++++++++
>>   1 file changed, 10 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
>> index 02aeb3b5a820..afc38aea6b1c 100644
>> --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
>> @@ -31,6 +31,13 @@ Required properties for DMC device for Exynos5422:
>>   	The register offsets are in the driver code and specyfic for this SoC
>>   	type.
>>   
>> +Optional properties for DMC device for Exynos5422:
>> +- interrupt-parent : The parent interrupt controller.
>> +- interrupts : Contains the IRQ line numbers for the DMC internal performance
>> +  event counters. Align with specification of the interrupt line(s) in the
>> +  interrupt-parent controller.
>> +- interrupt-names : List of IRQ names.
> 
> Since the names are important (not the order) they are part of the
> bindings and they must be listed here.

Good point, thanks. I will add it to the description.

Regards,
Lukasz

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ