[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20191002084404.GA3101@Red>
Date: Wed, 2 Oct 2019 10:44:04 +0200
From: Corentin Labbe <clabbe.montjoie@...il.com>
To: Maxime Ripard <mripard@...nel.org>
Cc: catalin.marinas@....com, davem@...emloft.net,
herbert@...dor.apana.org.au, linux@...linux.org.uk,
mark.rutland@....com, robh+dt@...nel.org, wens@...e.org,
will@...nel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-crypto@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [PATCH v2 05/11] ARM: dts: sun8i: H3: Add Crypto Engine node
On Wed, Oct 02, 2019 at 08:02:14AM +0200, Maxime Ripard wrote:
> On Tue, Oct 01, 2019 at 08:41:35PM +0200, Corentin Labbe wrote:
> > The Crypto Engine is a hardware cryptographic accelerator that supports
> > many algorithms.
> > It could be found on most Allwinner SoCs.
> >
> > This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree.
> >
> > Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
> > ---
> > arch/arm/boot/dts/sun8i-h3.dtsi | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> > index e37c30e811d3..778a23a794c9 100644
> > --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> > @@ -153,6 +153,17 @@
> > allwinner,sram = <&ve_sram 1>;
> > };
> >
> > + crypto: crypto@...5000 {
> > + compatible = "allwinner,sun8i-h3-crypto";
> > + reg = <0x01c15000 0x1000>;
> > + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "ce_ns";
>
> That's not documented in the binding (and I guess unnecessary)
>
Hello
Yes this should be removed.
> > + resets = <&ccu RST_BUS_CE>;
> > + reset-names = "bus";
> > + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
> > + clock-names = "bus", "mod";
>
> Nit: we put the clocks before the resets usually
>
Will do it.
Thanks
Regards
Powered by blists - more mailing lists