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Message-ID: <CAJ+vNU0Ma5nG9_ThLO4cdO+=ivf7rmXiHZonF0HY0xx6X3R6Hw@mail.gmail.com>
Date: Thu, 3 Oct 2019 11:27:37 -0700
From: Tim Harvey <tharvey@...eworks.com>
To: Douglas Anderson <dianders@...omium.org>,
Robin Murphy <robin.murphy@....com>,
Tirumalesh Chalamarla <tchalamarla@...iumnetworks.com>
Cc: Joerg Roedel <joro@...tes.org>, Will Deacon <will.deacon@....com>,
linux-arm-msm@...r.kernel.org, evgreen@...omium.org,
tfiga@...omium.org, Rob Clark <robdclark@...il.com>,
iommu@...ts.linux-foundation.org,
linux-arm-kernel@...ts.infradead.org,
Vivek Gautam <vivek.gautam@...eaurora.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] iommu/arm-smmu: Break insecure users by disabling
bypass by default
On Fri, Mar 1, 2019 at 11:21 AM Douglas Anderson <dianders@...omium.org> wrote:
>
> If you're bisecting why your peripherals stopped working, it's
> probably this CL. Specifically if you see this in your dmesg:
> Unexpected global fault, this could be serious
> ...then it's almost certainly this CL.
>
> Running your IOMMU-enabled peripherals with the IOMMU in bypass mode
> is insecure and effectively disables the protection they provide.
> There are few reasons to allow unmatched stream bypass, and even fewer
> good ones.
>
> This patch starts the transition over to make it much harder to run
> your system insecurely. Expected steps:
>
> 1. By default disable bypass (so anyone insecure will notice) but make
> it easy for someone to re-enable bypass with just a KConfig change.
> That's this patch.
>
> 2. After people have had a little time to come to grips with the fact
> that they need to set their IOMMUs properly and have had time to
> dig into how to do this, the KConfig will be eliminated and bypass
> will simply be disabled. Folks who are truly upset and still
> haven't fixed their system can either figure out how to add
> 'arm-smmu.disable_bypass=n' to their command line or revert the
> patch in their own private kernel. Of course these folks will be
> less secure.
>
> Suggested-by: Robin Murphy <robin.murphy@....com>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
Hi Doug / Robin,
I ran into this breaking things on OcteonTx boards based on CN80XX
CPU. The IOMMU configuration is a bit beyond me and I'm hoping you can
offer some advice. The IOMMU here is cavium,smmu-v2 as defined in
https://github.com/Gateworks/dts-newport/blob/master/cn81xx-linux.dtsi
Booting with 'arm-smmu.disable_bypass=n' does indeed work around the
breakage as the commit suggests.
Any suggestions for a proper fix?
Best Regards,
Tim
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