linux-kernel - Re: [PATCH 2/2] ARM: dts: at91: sama5d27_som1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Thu, 3 Oct 2019 21:42:03 +0200
From:   Alexandre Belloni <alexandre.belloni@...tlin.com>
To:     Eugen.Hristev@...rochip.com
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
        adrian.hunter@...el.com, Nicolas.Ferre@...rochip.com,
        ulf.hansson@...aro.org
Subject: Re: [PATCH 2/2] ARM: dts: at91: sama5d27_som1_ek: add mmc
 capabilities for SDMMC0

On 03/10/2019 10:24:52+0000, Eugen.Hristev@...rochip.com wrote:
> 
> 
> On 13.08.2019 09:53, Ludovic Desroches wrote:
> > On Mon, Aug 12, 2019 at 03:38:34PM +0000, Eugen.Hristev@...rochip.com wrote:
> >> On 09.08.2019 09:23, Ludovic Desroches wrote:
> >>> On Thu, Aug 08, 2019 at 03:57:30PM +0300, Adrian Hunter wrote:
> >>>> On 8/08/19 3:42 PM, Ludovic Desroches wrote:
> >>>>> On Thu, Aug 08, 2019 at 10:35:43AM +0200, Eugen Hristev - M18282 wrote:
> >>>>>> From: Eugen Hristev <eugen.hristev@...rochip.com>
> >>>>>>
> >>>>>> Add mmc capabilities for SDMMC0 for this board.
> >>>>>> With this enabled, eMMC connected card is detected as:
> >>>>>>
> >>>>>> mmc0: new DDR MMC card at address 0001
> >>>>>>
> >>>>>> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
> >>>>> Acked-by: Ludovic Desroches <ludovic.desroches@...rochip.com>
> >>>>>
> >>>>> I am interested to have the some insights about the use of sd-uhs-*
> >>>>> properties.
> >>>>>
> >>>>> Our IP can't deal with 1V8 by itself. It has a 1V8SEL signal which can
> >>>>> be used as the logic control input of a mux. So even if the IP claims
> >>>>> to support UHS modes, it depends on the board.
> >>>>>
> >>>>> Are the sd-uhs-* properties a way to deal with this? I tend to think no
> >>>>> as sdhci_setup_host() will set the caps depending on the content of the
> >>>>> capabilities register. Do we have to use the SDHCI_QUIRK_MISSING_CAPS
> >>>>> quirk or sdhci-caps/sdhci-caps-mask?
> >>>>
> >>>> There is "no-1-8-v" which it looks like sdhci-of-at91.c already supports:
> >>>>
> >>>>     sdhci_at91_probe() -> sdhci_get_of_property() -> sdhci_get_property()
> >>>>
> >>>>       	if (device_property_present(dev, "no-1-8-v"))
> >>>> 		host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
> >>>>
> >>>
> >>> Right, I forgot this property. Thanks.
> >>>
> >>> Eugen, do you see cases we can't cover with this property?
> >>
> >> Hi,
> >>
> >> For current requirements and driver support, this should be enough.
> >>
> >> I noticed one thing regarding SD-Cards, if I add property sd-uhs-sdr104
> >> the class 10 uhs1 cards are detected as SDR104 . Without this property
> >> they are detected as DDR50. Any idea why the difference ? The controller
> >> does not claim to have SDR104 support ?  We should add it ?
> > 
> > With the mainline, our tree or both? In our tree, SDR104 is removed from
> > the capabilities.
> > 
> > Ludovic
> > 
> 
> 
> Hello Alexandre,
> 
> Anything more needed regarding this patch ?
> 

I was not sure it was applicable, seeing the discussion. I'll apply it
now.


-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com