linux-kernel - [PATCH] tty: serial: fsl_lpuart: Fix lpuart_flush

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Message-Id: <20191004215537.5308-1-andrew.smirnov@gmail.com>
Date:   Fri,  4 Oct 2019 14:55:37 -0700
From:   Andrey Smirnov <andrew.smirnov@...il.com>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc:     Andrey Smirnov <andrew.smirnov@...il.com>,
        Stefan Agner <stefan@...er.ch>, Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Chris Healy <cphealy@...il.com>,
        Cory Tusar <cory.tusar@....aero>,
        Lucas Stach <l.stach@...gutronix.de>,
        Jiri Slaby <jslaby@...e.com>, linux-imx@....com,
        linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH] tty: serial: fsl_lpuart: Fix lpuart_flush_buffer()

Fix incorrect read-modify-write sequence in lpuart_flush_buffer() that
was reading from UARTPFIFO and writing to UARTCFIFO instead of
operating solely on the latter.

Fixes: 9bc19af9dacb ("tty: serial: fsl_lpuart: Flush HW FIFOs in .flush_buffer")
Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
Cc: Stefan Agner <stefan@...er.ch>
Cc: Andrew Lunn <andrew@...n.ch>
Cc: Vivien Didelot <vivien.didelot@...il.com>
Cc: Chris Healy <cphealy@...il.com>
Cc: Cory Tusar <cory.tusar@....aero>
Cc: Lucas Stach <l.stach@...gutronix.de>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Jiri Slaby <jslaby@...e.com>
Cc: linux-imx@....com
Cc: linux-serial@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
---

Greg:

This bug causes occasional boot hang on 5.4-rc1 on Vybrid, so it might
be good to push that for 5.4-rc2.

Thanks,
Andrey Sirnov

 drivers/tty/serial/fsl_lpuart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 3e17bb8a0b16..537896c4d887 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -548,7 +548,7 @@ static void lpuart_flush_buffer(struct uart_port *port)
 		val |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH;
 		lpuart32_write(&sport->port, val, UARTFIFO);
 	} else {
-		val = readb(sport->port.membase + UARTPFIFO);
+		val = readb(sport->port.membase + UARTCFIFO);
 		val |= UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH;
 		writeb(val, sport->port.membase + UARTCFIFO);
 	}
-- 
2.21.0