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Message-ID: <20191006021632.GM7150@dragon>
Date: Sun, 6 Oct 2019 10:16:33 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Anson Huang <Anson.Huang@....com>
Cc: mturquette@...libre.com, sboyd@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, leonard.crestez@....com,
abel.vesa@....com, peng.fan@....com, ping.bai@....com,
chen.fang@....com, shengjiu.wang@....com, aisheng.dong@....com,
sfr@...b.auug.org.au, l.stach@...gutronix.de,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Linux-imx@....com
Subject: Re: [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure
to common place
On Fri, Sep 06, 2019 at 09:34:05AM -0400, Anson Huang wrote:
> Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
> i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
> to pll14xx driver can save a lot of duplicated code on each
> platform.
>
> Meanwhile, no need to define PLL clock structure for every
> module which uses same type of PLL, e.g., audio/video/dram use
> 1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
> structure for each group is enough.
>
> Signed-off-by: Anson Huang <Anson.Huang@....com>
Applied both, thanks.
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