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Message-ID: <f26580de-d423-3369-42f4-682824dd592d@redhat.com>
Date: Mon, 7 Oct 2019 19:11:24 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Sean Christopherson <sean.j.christopherson@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
x86@...nel.org, Peter Zijlstra <peterz@...radead.org>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Radim Krčmář <rkrcmar@...hat.com>,
Tony Luck <tony.luck@...el.com>,
Tony W Wang-oc <TonyWWang-oc@...oxin.com>
Cc: "H. Peter Anvin" <hpa@...or.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, linux-edac@...r.kernel.org,
Borislav Petkov <bp@...e.de>,
Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Subject: Re: [PATCH 10/16] x86/cpu: Detect VMX features on Intel, Centaur and
Zhaoxin CPUs
On 04/10/19 23:56, Sean Christopherson wrote:
> + /*
> + * The high bits contain the allowed-1 settings, i.e. features that can
> + * be turned on. The low bits contain the allowed-0 settings, i.e.
> + * features that can be turned off. Ignore the allowed-0 settings,
> + * if a feature can be turned on then it's supported.
> + */
> + rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
For QEMU, we're defining a feature as supported if a feature can be
turned both on and off. Since msr_low and msr_high can be defined
respectively as must-be-one and can-be-one, the features become
"msr_high & ~msr_low".
Also, shouldn't this use the "true" feature availability MSRs if available?
Paolo
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