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Date:   Mon, 7 Oct 2019 15:42:17 +0800
From:   "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
To:     Rob Herring <robh@...nel.org>
Cc:     kishon@...com, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, andriy.shevchenko@...el.com,
        cheol.yong.kim@...el.com, qi-ming.wu@...el.com,
        peter.harliman.liem@...el.com
Subject: Re: [PATCH v5 1/2] dt-bindings: phy: intel-emmc-phy: Add YAML schema
 for LGM eMMC PHY

Hi Rob,

On 18/9/2019 10:23 AM, Ramuthevar, Vadivel MuruganX wrote:
> Hi Rob,
>
> Thank you for the review comments.
>
> On 17/9/2019 10:23 PM, Rob Herring wrote:
>> On Wed, Sep 04, 2019 at 01:53:43PM +0800, Ramuthevar,Vadivel MuruganX 
>> wrote:
>>> From: Ramuthevar Vadivel Murugan 
>>> <vadivel.muruganx.ramuthevar@...ux.intel.com>
>>>
>>> Add a YAML schema to use the host controller driver with the
>>> eMMC PHY on Intel's Lightning Mountain SoC.
>>>
>>> Signed-off-by: Ramuthevar Vadivel Murugan 
>>> <vadivel.muruganx.ramuthevar@...ux.intel.com>
>>> ---
>>> changes in v5:
>>>    - earlier Review-by tag given by Rob
>>>    - rework done with syscon parent node.
>>>
>>> changes in v4:
>>>    - As per Rob's review: validate 5.2 and 5.3
>>>    - drop unrelated items.
>>>
>>> changes in v3:
>>>    - resolve 'make dt_binding_check' warnings
>>>
>>> changes in v2:
>>>    As per Rob Herring review comments, the following updates
>>>   - change GPL-2.0 -> (GPL-2.0-only OR BSD-2-Clause)
>>>   - filename is the compatible string plus .yaml
>>>   - LGM: Lightning Mountain
>>>   - update maintainer
>>>   - add intel,syscon under property list
>>>   - keep one example instead of two
>>> ---
>>>   .../bindings/phy/intel,lgm-emmc-phy.yaml           | 69 
>>> ++++++++++++++++++++++
>>>   1 file changed, 69 insertions(+)
>>>   create mode 100644 
>>> Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
>>>
>>> diff --git 
>>> a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml 
>>> b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
>>> new file mode 100644
>>> index 000000000000..8f6ac8b3da42
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
>>> @@ -0,0 +1,69 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
>>> +
>>> +maintainers:
>>> +  - Ramuthevar Vadivel Murugan 
>>> <vadivel.muruganx.ramuthevar@...ux.intel.com>
>>> +
>>> +description: Bindings for eMMC PHY on Intel's Lightning Mountain 
>>> SoC, syscon
>>> +  node is used to reference the base address of eMMC phy registers.
>>> +
>>> +select:
>>> +  properties:
>>> +    compatible:
>>> +      contains:
>>> +        const: intel,lgm-syscon
>> This, plus...
>
> you mean, need to add two compatible here-itself look like below
>
> const: intel,lgm-syscon
> const: intel,lgm-emmc-phy
>
> Is it right?
>
Shall I proceed with above compatibles if you agree upon. Thanks!

With Best Regards
Vadivel Murugan
>>> +
>>> +    reg:
>>> +      maxItems: 1
>>> +
>>> +  required:
>>> +    - compatible
>>> +    - reg
>>> +
>>> +properties:
>>> +  "#phy-cells":
>>> +    const: 0
>>> +
>>> +  compatible:
>>> +    contains:
>>> +      const: intel,lgm-emmc-phy
>> ...this should not pass validation as they contradict each other.
> when  I do "make dt_binding_check" didn't throw an error,  let me 
> double confirm once clarified first comment.
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +  clocks:
>>> +    maxItems: 1
>>> +
>>> +  clock-names:
>>> +    maxItems: 1
>>> +
>>> +required:
>>> +  - "#phy-cells"
>>> +  - compatible
>>> +  - reg
>>> +  - clocks
>>> +  - clock-names
>>> +
>>> +examples:
>>> +  - |
>>> +    sysconf: chiptop@...00000 {
>>> +      compatible = "intel,lgm-syscon";
>>> +      reg = <0xe0200000 0x100>;
>> I'm still waiting for a complete description of what all is in this
>> block.
> Agree!, I will  add it.
>>> +
>>> +      emmc-phy: emmc-phy {
>>> +        compatible = "intel,lgm-emmc-phy";
>>> +        reg = <0x00a8 0x4>,
>>> +              <0x00ac 0x4>,
>>> +              <0x00b0 0x4>,
>>> +              <0x00b4 0x4>;
>> Looks contiguous and can be a single entry:
>>
>> <0xa8 0x10>
> Agreed, will fix it.
>
> Best Regards
> Vadivel
>>> +        clocks = <&emmc>;
>>> +        clock-names = "emmcclk";
>>> +        #phy-cells = <0>;
>>> +      };
>>> +    };
>>> +...
>>> -- 
>>> 2.11.0
>>>

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