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Message-Id: <1570524399-7192-1-git-send-email-joyce.ooi@intel.com>
Date: Tue, 8 Oct 2019 01:46:39 -0700
From: Joyce Ooi <joyce.ooi@...el.com>
To: Dinh Nguyen <dinguyen@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Joyce Ooi <joyce.ooi@...el.com>,
Ong Hean Loong <hean.loong.ong@...el.com>,
See Chin Liang <chin.liang.see@...el.com>,
Tan Ley Foon <ley.foon.tan@...el.com>
Subject: [PATCH] arm64: dts: agilex: add QSPI support for Intel Agilex
From: "Ooi, Joyce" <joyce.ooi@...el.com>
This patch adds QSPI flash interface in device tree for Intel Agilex
Signed-off-by: Ooi, Joyce <joyce.ooi@...el.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
index 2ba9a5dc91aa..e3c5b007fb51 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
@@ -81,3 +81,38 @@
&watchdog0 {
status = "okay";
};
+
+&qspi {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mt25qu02g";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ m25p,fast-read;
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <1>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qspi_boot: partition@0 {
+ label = "Boot and fpga data";
+ reg = <0x0 0x034B0000>;
+ };
+
+ qspi_rootfs: partition@...0000 {
+ label = "Root Filesystem - JFFS2";
+ reg = <0x034B0000 0x0EB50000>;
+ };
+ };
+ };
+};
--
2.13.0
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