linux-kernel - [PATCH 0/9] perf: Several update for Comet Lake, Ice Lake and Tiger Lake

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Message-Id: <1570549810-25049-1-git-send-email-kan.liang@linux.intel.com>
Date:   Tue,  8 Oct 2019 08:50:01 -0700
From:   kan.liang@...ux.intel.com
To:     peterz@...radead.org, mingo@...nel.org,
        linux-kernel@...r.kernel.org
Cc:     ak@...ux.intel.com, Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 0/9] perf: Several update for Comet Lake, Ice Lake and Tiger Lake

From: Kan Liang <kan.liang@...ux.intel.com>

Comet Lake is the new 10th Gen Intel processor. Add Comet Lake to Intel family.
>From the perspective of Intel core PMU, there is nothing changed compared with
Sky Lake. Share the perf code with Sky Lake.
Add support for perf msr and cstate driver as well.

Tiger Lake is the followon to Ice Lake.
>From the perspective of Intel core PMU, there is little changes compared with
Ice Lake, e.g. small changes in the event list. But it doesn't impact on core
PMU functionality. Share the perf code with Ice Lake.
Add support for perf msr and cstate driver as well.

Both are verified on real hardware.

Also, update perf msr and cstate driver for Ice Lake.

Kan Liang (9):
  x86/cpu: Add Comet Lake to Intel family
  perf/x86/intel: Add Comet Lake CPU support
  perf/x86/msr: Add Comet Lake CPU support
  perf/x86/cstate: Add Comet Lake CPU support
  perf/x86/msr: Add more CPU model number for Ice Lake
  perf/x86/cstate: Update C-state counters for Ice Lake
  perf/x86/intel: Add Tiger Lake CPU support
  perf/x86/msr: Add Tiger Lake CPU support
  perf/x86/cstate: Add Tiger Lake CPU support

 arch/x86/events/intel/core.c        |  4 ++++
 arch/x86/events/intel/cstate.c      | 44 +++++++++++++++++++++++++++----------
 arch/x86/events/msr.c               |  7 ++++++
 arch/x86/include/asm/intel-family.h |  3 +++
 4 files changed, 46 insertions(+), 12 deletions(-)

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2.7.4