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Message-Id: <1570549810-25049-4-git-send-email-kan.liang@linux.intel.com>
Date: Tue, 8 Oct 2019 08:50:04 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...nel.org,
linux-kernel@...r.kernel.org
Cc: ak@...ux.intel.com, Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 3/9] perf/x86/msr: Add Comet Lake CPU support
From: Kan Liang <kan.liang@...ux.intel.com>
Comet Lake is the new 10th Gen Intel processor. PPERF and SMI_COUNT MSRs
are also supported.
The External Design Specification (EDS) is not published yet. It comes
from an authoritative internal source.
The patch has been tested on real hardware.
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
arch/x86/events/msr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index b1afc77..c177bbe 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -89,6 +89,8 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_SKYLAKE_X:
case INTEL_FAM6_KABYLAKE_L:
case INTEL_FAM6_KABYLAKE:
+ case INTEL_FAM6_COMETLAKE_L:
+ case INTEL_FAM6_COMETLAKE:
case INTEL_FAM6_ICELAKE_L:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
--
2.7.4
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