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Message-ID: <DB3PR0402MB391628A077B9D689469D38E3F5960@DB3PR0402MB3916.eurprd04.prod.outlook.com>
Date: Sat, 12 Oct 2019 01:05:24 +0000
From: Anson Huang <anson.huang@....com>
To: Fabio Estevam <festevam@...il.com>
CC: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Sascha Hauer <kernel@...gutronix.de>,
Aisheng Dong <aisheng.dong@....com>,
"Gustavo A. R. Silva" <gustavo@...eddedor.com>,
linux-clk <linux-clk@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH] clk: imx7ulp: Correct system clock source option #7
Hi, Fabio
> On Fri, Oct 11, 2019 at 5:39 AM Anson Huang <Anson.Huang@....com>
> wrote:
> >
> > In the latest reference manual Rev.0,06/2019, the SCG1's system
>
> This should be SCS instead of SCG1.
The reference states SCG system clock, SCS stands for system clock source, so I think
it is actually meaning SCG1's system clock source😊
Selects the SCG system clock.
0000b - Reserved
0001b - System OSC (SOSC_CLK)
0010b - Slow IRC (SIRC_CLK)
0011b - Fast IRC (FIRC_CLK)
0100b - Reserved
0101b - Auxiliary PLL (APLL_CLK)
0110b - System PLL (SPLL_CLK)
0111b - Reserved
>
> > clock source option #7 is no longer from upll, it is reserved, update
> > clock driver accordingly.
> >
> > Fixes: b1260067ac3d ("clk: imx: add imx7ulp clk driver")
> > Signed-off-by: Anson Huang <Anson.Huang@....com>
>
> Reviewed-by: Fabio Estevam <festevam@...il.com>
Thanks,
Anson
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