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Message-ID: <157088635853.9978.567895938553199892.tip-bot2@tip-bot2>
Date: Sat, 12 Oct 2019 13:19:18 -0000
From: "tip-bot2 for Kan Liang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...nel.org>, Borislav Petkov <bp@...en8.de>,
linux-kernel@...r.kernel.org
Subject: [tip: perf/urgent] perf/x86/msr: Add new CPU model numbers for Ice Lake
The following commit has been merged into the perf/urgent branch of tip:
Commit-ID: 1a5da78d00ce0152994946debd1417513dc35eb3
Gitweb: https://git.kernel.org/tip/1a5da78d00ce0152994946debd1417513dc35eb3
Author: Kan Liang <kan.liang@...ux.intel.com>
AuthorDate: Tue, 08 Oct 2019 08:50:06 -07:00
Committer: Ingo Molnar <mingo@...nel.org>
CommitterDate: Sat, 12 Oct 2019 15:13:09 +02:00
perf/x86/msr: Add new CPU model numbers for Ice Lake
PPERF and SMI_COUNT MSRs are also supported by Ice Lake desktop and
server.
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: https://lkml.kernel.org/r/1570549810-25049-6-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/events/msr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index c177bbe..8515512 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -92,6 +92,9 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_COMETLAKE_L:
case INTEL_FAM6_COMETLAKE:
case INTEL_FAM6_ICELAKE_L:
+ case INTEL_FAM6_ICELAKE:
+ case INTEL_FAM6_ICELAKE_X:
+ case INTEL_FAM6_ICELAKE_D:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;
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