linux-kernel - RE: [PATCH 4/6] PCI: mobiveil: Add workaround for unsupported request error

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Message-ID: <AM5PR04MB329953CADC8E2DC11AFFCA2EF5930@AM5PR04MB3299.eurprd04.prod.outlook.com>
Date:   Tue, 15 Oct 2019 07:46:51 +0000
From:   Xiaowei Bao <xiaowei.bao@....com>
To:     Russell King - ARM Linux admin <linux@...linux.org.uk>
CC:     "Z.q. Hou" <zhiqiang.hou@....com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>, "kishon@...com" <kishon@...com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        "andrew.murray@....com" <andrew.murray@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 4/6] PCI: mobiveil: Add workaround for unsupported request
 error



> -----Original Message-----
> From: Russell King - ARM Linux admin <linux@...linux.org.uk>
> Sent: 2019年9月25日 0:50
> To: Xiaowei Bao <xiaowei.bao@....com>
> Cc: Z.q. Hou <zhiqiang.hou@....com>; bhelgaas@...gle.com;
> robh+dt@...nel.org; mark.rutland@....com; shawnguo@...nel.org; Leo Li
> <leoyang.li@....com>; kishon@...com; lorenzo.pieralisi@....com; M.h. Lian
> <minghuan.lian@....com>; andrew.murray@....com; Mingkai Hu
> <mingkai.hu@....com>; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org
> Subject: Re: [PATCH 4/6] PCI: mobiveil: Add workaround for unsupported
> request error
> 
> On Mon, Sep 16, 2019 at 10:17:40AM +0800, Xiaowei Bao wrote:
> > Errata: unsupported request error on inbound posted write transaction,
> > PCIe controller reports advisory error instead of uncorrectable error
> > message to RC.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
> > ---
> >  drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c | 13
> +++++++++++++
> >  drivers/pci/controller/mobiveil/pcie-mobiveil.h           |  4 ++++
> >  2 files changed, 17 insertions(+)
> >
> > diff --git a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c
> > b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c
> > index 7bfec51..5bc9ed7 100644
> > --- a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c
> > +++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c
> > @@ -49,6 +49,19 @@ static void ls_pcie_g4_ep_init(struct
> mobiveil_pcie_ep *ep)
> >  	struct mobiveil_pcie *mv_pci = to_mobiveil_pcie_from_ep(ep);
> >  	int win_idx;
> >  	u8 bar;
> > +	u32 val;
> > +
> > +	/*
> > +	 * Errata: unsupported request error on inbound posted write
> > +	 * transaction, PCIe controller reports advisory error instead
> > +	 * of uncorrectable error message to RC.
> > +	 * workaround: set the bit20(unsupported_request_Error_severity) with
> > +	 * value 1 in uncorrectable_Error_Severity_Register, make the
> > +	 * unsupported request error generate the fatal error.
> > +	 */
> > +	val =  csr_readl(mv_pci, CFG_UNCORRECTABLE_ERROR_SEVERITY);
> > +	val |= 1 << UNSUPPORTED_REQUEST_ERROR_SHIFT;
> 
> 	       BIT(UNSUPPORTED_REQUEST_ERROR_SHIFT) ?

OK, thanks

Thanks 
Xiaowei

> 
> > +	csr_writel(mv_pci, val, CFG_UNCORRECTABLE_ERROR_SEVERITY);
> >
> >  	ep->bar_num = PCIE_LX2_BAR_NUM;
> >
> > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > index 7308fa4..a40707e 100644
> > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > @@ -123,6 +123,10 @@
> >  #define GPEX_BAR_SIZE_UDW		0x4DC
> >  #define GPEX_BAR_SELECT			0x4E0
> >
> > +#define CFG_UNCORRECTABLE_ERROR_SEVERITY	0x10c
> > +#define UNSUPPORTED_REQUEST_ERROR_SHIFT		20
> > +#define CFG_UNCORRECTABLE_ERROR_MASK		0x108
> > +
> >  /* starting offset of INTX bits in status register */
> >  #define PAB_INTX_START			5
> >
> > --
> > 2.9.5
> >
> >
> > _______________________________________________
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> --
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