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Message-ID: <20191017080400.GE32742@smile.fi.intel.com>
Date: Thu, 17 Oct 2019 11:04:00 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Lee Jones <lee.jones@...aro.org>
Cc: Tuowen Zhao <ztuowen@...il.com>, linux-kernel@...r.kernel.org,
mika.westerberg@...ux.intel.com, acelan.kao@...onical.com,
mcgrof@...nel.org, davem@...emloft.net
Subject: Re: [PATCH v5 0/4] Fix MTRR bug for intel-lpss-pci
On Thu, Oct 17, 2019 at 08:31:16AM +0100, Lee Jones wrote:
> On Thu, 17 Oct 2019, Andy Shevchenko wrote:
> > On Wed, Oct 16, 2019 at 03:06:25PM -0600, Tuowen Zhao wrote:
> > > Some BIOS erroneously specifies write-combining BAR for intel-lpss-pci
> > > in MTRR. This will cause the system to hang during boot. If possible,
> > > this bug could be corrected with a firmware update.
> > >
> > > Previous version: https://lkml.org/lkml/2019/10/14/575
> > >
> > > Changes from previous version:
> > >
> > > * implement ioremap_uc for sparc64
> > > * split docs changes to not CC stable (doc location moved since 5.3)
> > >
> >
> > It forgot to explicitly mention through which tree is supposed to go.
> > I think it's MFD one, correct?
>
> To be fair, that's not really up to the submitter to decide.
Submitter still can share their view, no?
--
With Best Regards,
Andy Shevchenko
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