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Message-ID: <1571441492-21919-4-git-send-email-vdumpa@nvidia.com>
Date:   Fri, 18 Oct 2019 16:31:28 -0700
From:   Krishna Reddy <vdumpa@...dia.com>
To:     unlisted-recipients:; (no To-header on input)
CC:     <joro@...tes.org>, <will@...nel.org>, <robin.murphy@....com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <iommu@...ts.linux-foundation.org>, <linux-kernel@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>, <treding@...dia.com>,
        <yhsu@...dia.com>, <snikam@...dia.com>, <praithatha@...dia.com>,
        <talho@...dia.com>, <avanbrunt@...dia.com>, <thomasz@...dia.com>,
        <olof@...om.net>, <jtukkinen@...dia.com>, <mperttunen@...dia.com>,
        <nicolinc@...dia.com>, Krishna Reddy <vdumpa@...dia.com>
Subject: [PATCH v3 3/7] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU

Add binding for NVIDIA's Tegra194 Soc SMMU that is based
on ARM MMU-500.

Signed-off-by: Krishna Reddy <vdumpa@...dia.com>
---
 Documentation/devicetree/bindings/iommu/arm,smmu.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 3133f3b..1d72fac 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -31,6 +31,10 @@ conditions.
                   as below, SoC-specific compatibles:
                   "qcom,sdm845-smmu-500", "arm,mmu-500"
 
+                  NVIDIA SoCs that use more than one ARM MMU-500 together
+                  needs following SoC-specific compatibles along with "arm,mmu-500":
+                  "nvidia,tegra194-smmu"
+
 - reg           : Base address and size of the SMMU.
 
 - #global-interrupts : The number of global interrupts exposed by the
-- 
2.7.4

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