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Message-ID: <20191018090127.GA25918@e121166-lin.cambridge.arm.com>
Date: Fri, 18 Oct 2019 10:01:27 +0100
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Vidya Sagar <vidyas@...dia.com>
Cc: bhelgaas@...gle.com, robh+dt@...nel.org, thierry.reding@...il.com,
jonathanh@...dia.com, andrew.murray@....com,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kthota@...dia.com,
mmaddireddy@...dia.com, sagar.tv@...il.com
Subject: Re: [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming
On Sat, Oct 05, 2019 at 10:12:11PM +0530, Vidya Sagar wrote:
> Corrects the programming to provide REFCLK to the downstream device
> when there is no CLKREQ sideband signal routing present from root port
> to the endpont.
>
> Signed-off-by: Vidya Sagar <vidyas@...dia.com>
> ---
> drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
Applied to pci/tegra, thanks.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index f89f5acee72d..cbe95f0ea0ca 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -40,8 +40,6 @@
> #define APPL_PINMUX_CLKREQ_OVERRIDE BIT(3)
> #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN BIT(4)
> #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE BIT(5)
> -#define APPL_PINMUX_CLKREQ_OUT_OVRD_EN BIT(9)
> -#define APPL_PINMUX_CLKREQ_OUT_OVRD BIT(10)
>
> #define APPL_CTRL 0x4
> #define APPL_CTRL_SYS_PRE_DET_STATE BIT(6)
> @@ -1193,8 +1191,8 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
>
> if (!pcie->supports_clkreq) {
> val = appl_readl(pcie, APPL_PINMUX);
> - val |= APPL_PINMUX_CLKREQ_OUT_OVRD_EN;
> - val |= APPL_PINMUX_CLKREQ_OUT_OVRD;
> + val |= APPL_PINMUX_CLKREQ_OVERRIDE_EN;
> + val &= ~APPL_PINMUX_CLKREQ_OVERRIDE;
> appl_writel(pcie, val, APPL_PINMUX);
> }
>
> --
> 2.17.1
>
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