linux-kernel - Re: [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex

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Message-ID: <1571360401.2504.3.camel@intel.com>
Date:   Fri, 18 Oct 2019 09:00:01 +0800
From:   Ley Foon Tan <ley.foon.tan@...el.com>
To:     "Ooi, Joyce" <joyce.ooi@...el.com>,
        Dinh Nguyen <dinguyen@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Ong Hean Loong <hean.loong.ong@...el.com>,
        See Chin Liang <chin.liang.see@...el.com>
Subject: Re: [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex

On Wed, 2019-10-16 at 02:40 -0700, Ooi, Joyce wrote:
> This patch adds QSPI flash interface in device tree for Intel Agilex
> 
> Signed-off-by: Ooi, Joyce <joyce.ooi@...el.com>
> ---
> v2: update the qspi_rootfs partition size
> ---
>  arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35
> ++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> index 7814a9e..8de8118 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> @@ -73,3 +73,38 @@
>  &watchdog0 {
>  	status = "okay";
>  };
> +
> +&qspi {
> +	flash@0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "mt25qu02g";
> +		reg = <0>;
> +		spi-max-frequency = <50000000>;
QSPI can support up to 100MHz.
> +
> +		m25p,fast-read;
> +		cdns,page-size = <256>;
> +		cdns,block-size = <16>;
> +		cdns,read-delay = <1>;
> +		cdns,tshsl-ns = <50>;
> +		cdns,tsd2d-ns = <50>;
> +		cdns,tchsh-ns = <4>;
> +		cdns,tslch-ns = <4>;
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			qspi_boot: partition@0 {
> +				label = "Boot and fpga data";
> +				reg = <0x0 0x034B0000>;
> +			};
> +
> +			qspi_rootfs: partition@...0000 {
> +				label = "Root Filesystem - JFFS2";
> +				reg = <0x034B0000 0x0CB50000>;
> +			};
> +		};
> +	};
> +};