linux-kernel - Re: [PATCH v3 6/6] KVM: x86/vPMU: Add lazy mechanism to release perf

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Message-ID: <c17a9d77-2c30-b3c0-4652-57f0b9252f3b@redhat.com>
Date:   Tue, 22 Oct 2019 12:47:11 +0200
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Like Xu <like.xu@...ux.intel.com>, peterz@...radead.org,
        kvm@...r.kernel.org
Cc:     like.xu@...el.com, linux-kernel@...r.kernel.org,
        jmattson@...gle.com, sean.j.christopherson@...el.com,
        wei.w.wang@...el.com, kan.liang@...el.com
Subject: Re: [PATCH v3 6/6] KVM: x86/vPMU: Add lazy mechanism to release
 perf_event per vPMC

On 21/10/19 18:06, Like Xu wrote:
>  
> +		__set_bit(INTEL_PMC_IDX_FIXED + i, pmu->pmc_in_use);
>  		reprogram_fixed_counter(pmc, new_ctrl, i);
>  	}
>  
> @@ -329,6 +330,11 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
>  	    (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &&
>  	    (entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
>  		pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;
> +
> +	bitmap_set(pmu->all_valid_pmc_idx,
> +		0, pmu->nr_arch_gp_counters);
> +	bitmap_set(pmu->all_valid_pmc_idx,
> +		INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);

The offset needs to be INTEL_PMC_IDX_FIXED for GP counters, and 0 for
fixed counters, otherwise pmc_in_use and all_valid_pmc_idx are not in sync.

Paolo