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Message-ID: <3b5f4018-82b1-946d-d81d-252eb872d5d1@linaro.org>
Date: Tue, 22 Oct 2019 13:24:18 +0100
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: robh+dt@...nel.org, mark.rutland@....com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
christoph.muellner@...obroma-systems.com
Subject: Re: [PATCH 1/2] dt-bindings: nvmem: add binding for Rockchip OTP
controller
On 25/09/2019 19:49, Heiko Stuebner wrote:
> Newer Rockchip SoCs use a different IP for accessing special one-
> time-programmable memory, so add a binding for these controllers.
>
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
Applied both, thanks,
srini
> ---
> .../bindings/nvmem/rockchip-otp.txt | 25 +++++++++++++++++++
> 1 file changed, 25 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
>
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> new file mode 100644
> index 000000000000..40f649f7c2e5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> @@ -0,0 +1,25 @@
> +Rockchip internal OTP (One Time Programmable) memory device tree bindings
> +
> +Required properties:
> +- compatible: Should be one of the following.
> + - "rockchip,px30-otp" - for PX30 SoCs.
> + - "rockchip,rk3308-otp" - for RK3308 SoCs.
> +- reg: Should contain the registers location and size
> +- clocks: Must contain an entry for each entry in clock-names.
> +- clock-names: Should be "otp", "apb_pclk" and "phy".
> +- resets: Must contain an entry for each entry in reset-names.
> + See ../../reset/reset.txt for details.
> +- reset-names: Should be "phy".
> +
> +See nvmem.txt for more information.
> +
> +Example:
> + otp: otp@...90000 {
> + compatible = "rockchip,px30-otp";
> + reg = <0x0 0xff290000 0x0 0x4000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
> + <&cru PCLK_OTP_PHY>;
> + clock-names = "otp", "apb_pclk", "phy";
> + };
>
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