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Date: Wed, 23 Oct 2019 11:32:21 -0600
From: Mathieu Poirier <mathieu.poirier@...aro.org>
To: Michal Simek <michal.simek@...inx.com>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Michal Simek <monstr@...str.eu>, git@...inx.com,
Zumeng Chen <zumeng.chen@...driver.com>,
Quanyang Wang <quanyang.wang@...driver.com>,
Mark Rutland <mark.rutland@....com>,
Peter Crosthwaite <peter.crosthwaite@...inx.com>,
Rob Herring <robh+dt@...nel.org>,
Rob Herring <robh@...nel.org>,
Rob Herring <robherring2@...il.com>,
Steffen Trumtrar <s.trumtrar@...gutronix.de>,
devicetree@...r.kernel.org,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
u-boot@...ts.denx.de
Subject: Re: [PATCH] ARM: dts: zynq: enablement of coresight topology
Hi Michal,
I was not CC'ed on the original post so I just noticed this today,
hence the late reply. I don't know if you were looking for feedback
or already picked up the patch but here it is anyway.
On Wed, 9 Oct 2019 at 08:07, Michal Simek <michal.simek@...inx.com> wrote:
>
> From: Zumeng Chen <zumeng.chen@...driver.com>
>
> This patch is to build the coresight topology structure of zynq-7000
> series according to the docs of coresight and userguide of zynq-7000.
>
> Signed-off-by: Zumeng Chen <zumeng.chen@...driver.com>
> Signed-off-by: Quanyang Wang <quanyang.wang@...driver.com>
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
> ---
>
> arch/arm/boot/dts/zynq-7000.dtsi | 158 +++++++++++++++++++++++++++++++
> 1 file changed, 158 insertions(+)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index ca6425ad794c..86430ad76fee 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -59,6 +59,40 @@
> regulator-always-on;
> };
>
> + replicator {
> + compatible = "arm,coresight-static-replicator";
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* replicator output ports */
> + port@0 {
> + reg = <0>;
> + replicator_out_port0: endpoint {
> + remote-endpoint = <&tpiu_in_port>;
> + };
> + };
> + port@1 {
> + reg = <1>;
> + replicator_out_port1: endpoint {
> + remote-endpoint = <&etb_in_port>;
> + };
> + };
> + };
> + in-ports {
> + /* replicator input port */
> + port {
> + replicator_in_port0: endpoint {
> + slave-mode;
The slave-mode property is no longer required and probably an
oversight since it doesn't appear elsewhere in this patch.
> + remote-endpoint = <&funnel_out_port>;
> + };
> + };
> + };
> + };
> +
> amba: amba {
> compatible = "simple-bus";
> #address-cells = <1>;
> @@ -365,5 +399,129 @@
> reg = <0xf8005000 0x1000>;
> timeout-sec = <10>;
> };
> +
> + etb@...01000 {
> + compatible = "arm,coresight-etb10", "arm,primecell";
> + reg = <0xf8801000 0x1000>;
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> + in-ports {
> + port {
> + etb_in_port: endpoint {
> + remote-endpoint = <&replicator_out_port1>;
> + };
> + };
> + };
> + };
> +
> + tpiu@...03000 {
> + compatible = "arm,coresight-tpiu", "arm,primecell";
> + reg = <0xf8803000 0x1000>;
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> + in-ports {
> + port {
> + tpiu_in_port: endpoint {
> + remote-endpoint = <&replicator_out_port0>;
> + };
> + };
> + };
> + };
> +
> + funnel@...04000 {
> + compatible = "arm,coresight-static-funnel", "arm,primecell";
> + reg = <0xf8804000 0x1000>;
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> +
> + /* funnel output ports */
> + out-ports {
> + port {
> + funnel_out_port: endpoint {
> + remote-endpoint =
> + <&replicator_in_port0>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* funnel input ports */
> + port@0 {
> + reg = <0>;
> + funnel0_in_port0: endpoint {
> + remote-endpoint = <&ptm0_out_port>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + funnel0_in_port1: endpoint {
> + remote-endpoint = <&ptm1_out_port>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + funnel0_in_port2: endpoint {
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> + funnel0_in_port3: endpoint {
> + remote-endpoint = <&itm_out_port>;
> + };
> + };
> + /* The other input ports are not connect to anything */
> + };
> + };
> +
> + /* ITM is not supported by kernel, only leave device node here */
> + itm@...05000 {
> + compatible = "arm,coresight-etm3x", "arm,primecell";
If I remember correctly ITM and ETMv3 are quite different - please
remove entirely.
> + reg = <0xf8805000 0x1000>;
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> + out-ports {
> + port {
> + itm_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port3>;
> + };
> + };
> + };
> + };
> +
> + ptm@...9c000 {
> + compatible = "arm,coresight-etm3x", "arm,primecell";
> + reg = <0xf889c000 0x1000>;
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> + cpu = <&cpu0>;
> + out-ports {
> + port {
> + ptm0_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port0>;
> + };
> + };
> + };
> + };
> +
> + ptm@...9d000 {
> + compatible = "arm,coresight-etm3x", "arm,primecell";
> + reg = <0xf889d000 0x1000>;
> + clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
> + clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
> + cpu = <&cpu1>;
> + out-ports {
> + port {
> + ptm1_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port1>;
> + };
> + };
> + };
> + };
With the above:
Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org>
> };
> };
> --
> 2.17.1
>
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