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Message-Id: <20191023090219.15603-12-rnayak@codeaurora.org>
Date:   Wed, 23 Oct 2019 14:32:19 +0530
From:   Rajendra Nayak <rnayak@...eaurora.org>
To:     agross@...nel.org, robh+dt@...nel.org, bjorn.andersson@...aro.org
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, mka@...omium.org,
        Maulik Shah <mkshah@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>
Subject: [PATCH v3 11/11] arm64: dts: qcom: sc7180: Add pdc interrupt controller

From: Maulik Shah <mkshah@...eaurora.org>

Add pdc interrupt controller for sc7180

Signed-off-by: Maulik Shah <mkshah@...eaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
---
v3:
Used the qcom,sdm845-pdc compatible for pdc node

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index f2981ada578f..07ea393c2b5f 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -184,6 +184,16 @@
 			#power-domain-cells = <1>;
 		};
 
+		pdc: interrupt-controller@...0000 {
+			compatible = "qcom,sdm845-pdc";
+			reg = <0 0xb220000 0 0x30000>;
+			qcom,pdc-ranges = <0 480 15>, <17 497 98>,
+					  <119 634 4>, <124 639 1>;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&intc>;
+			interrupt-controller;
+		};
+
 		qupv3_id_1: geniqup@...000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0 0x00ac0000 0 0x6000>;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
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