linux-kernel - Re: [Xen-devel] [PATCH] x86/stackframe/32: repair 32-bit Xen PV

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Message-ID: <CALCETrXp0oEu1zeCHUjPJb+i6Y7vR6zCtHGKzP3qpW3S49mhBg@mail.gmail.com>
Date:   Thu, 24 Oct 2019 09:33:45 -0700
From:   Andy Lutomirski <luto@...nel.org>
To:     Andrew Cooper <andrew.cooper3@...rix.com>
Cc:     Andy Lutomirski <luto@...nel.org>, Jan Beulich <jbeulich@...e.com>,
        xen-devel <xen-devel@...ts.xenproject.org>,
        X86 ML <x86@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
        lkml <linux-kernel@...r.kernel.org>
Subject: Re: [Xen-devel] [PATCH] x86/stackframe/32: repair 32-bit Xen PV

On Thu, Oct 24, 2019 at 9:32 AM Andrew Cooper <andrew.cooper3@...rix.com> wrote:
>
> On 24/10/2019 17:11, Andy Lutomirski wrote:
> >> +# define USER_SEGMENT_RPL_MASK (SEGMENT_RPL_MASK & ~1)
> >> +#endif
> >> +
> >>         .section .entry.text, "ax"
> >>
> >>  /*
> >> @@ -172,7 +183,7 @@
> >>         ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
> >>         .if \no_user_check == 0
> >>         /* coming from usermode? */
> >> -       testl   $SEGMENT_RPL_MASK, PT_CS(%esp)
> >> +       testl   $USER_SEGMENT_RPL_MASK, PT_CS(%esp)
> > Shouldn't PT_CS(%esp) be 0 if we came from the kernel?  I'm guessing
> > the actual bug is in whatever code put 1 in here in the first place.
>
> Ring1 kernels (32bit) consistently see RPL1 everywhere under Xen.
>
> Back in the days of a 32bit Xen, int $0x80 really was wired directly
> from ring 3 to 1, and didn't bounce through Xen.  This isn't possible in
> long mode, because all IDT gates are required to be 64bit code segments.
>
> Ring3 kernels (64bit) consistently see RPL0 everywhere under Xen,
> because presumably this was less invasive when designing the ABI.
>

OK, gotcha.

So I'm fine with this patch if you improve the comment and definition.