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Message-Id: <20191025185128.24068-5-clabbe.montjoie@gmail.com>
Date: Fri, 25 Oct 2019 20:51:28 +0200
From: Corentin Labbe <clabbe.montjoie@...il.com>
To: davem@...emloft.net, herbert@...dor.apana.org.au,
mark.rutland@....com, mripard@...nel.org, p.zabel@...gutronix.de,
robh+dt@...nel.org, wens@...e.org
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com,
Corentin Labbe <clabbe.montjoie@...il.com>
Subject: [PATCH v3 4/4] ARM: dts: sun9i: a80: Add Security System node
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms.
It could be found on Allwinner SoC A80 and A83T
This patch adds it on the Allwinner A80 SoC Device-tree.
Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index b5c46934b5b1..1d900f591d5f 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -457,6 +457,15 @@
reg = <0x01700000 0x100>;
};
+ crypto: crypto@...2000 {
+ compatible = "allwinner,sun9i-a80-crypto";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_BUS_SS>;
+ clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
+ clock-names = "bus", "mod";
+ };
+
mmc0: mmc@...f000 {
compatible = "allwinner,sun9i-a80-mmc";
reg = <0x01c0f000 0x1000>;
--
2.21.0
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