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Message-ID: <20191025194730.GM20212@google.com>
Date:   Fri, 25 Oct 2019 12:47:30 -0700
From:   Matthias Kaehlcke <mka@...omium.org>
To:     Rajendra Nayak <rnayak@...eaurora.org>
Cc:     agross@...nel.org, robh+dt@...nel.org, bjorn.andersson@...aro.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Maulik Shah <mkshah@...eaurora.org>
Subject: Re: [PATCH v3 11/11] arm64: dts: qcom: sc7180: Add pdc interrupt
 controller

Hi Rajendra/Maulik,

On Wed, Oct 23, 2019 at 02:32:19PM +0530, Rajendra Nayak wrote:
> From: Maulik Shah <mkshah@...eaurora.org>
> 
> Add pdc interrupt controller for sc7180
> 
> Signed-off-by: Maulik Shah <mkshah@...eaurora.org>
> Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
> ---
> v3:
> Used the qcom,sdm845-pdc compatible for pdc node
> 
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index f2981ada578f..07ea393c2b5f 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -184,6 +184,16 @@
>  			#power-domain-cells = <1>;
>  		};
>  
> +		pdc: interrupt-controller@...0000 {

Aren't the nodes supposed to be ordered by address as for SDM845?
If so this node should be added after 'qupv3_id_1: geniqup@...000',
not before.

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