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Message-ID: <AM0PR04MB4481FA56EFA3C34193241D3D88650@AM0PR04MB4481.eurprd04.prod.outlook.com>
Date: Fri, 25 Oct 2019 06:14:21 +0000
From: Peng Fan <peng.fan@....com>
To: Shawn Guo <shawnguo@...nel.org>
CC: "mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>,
Anson Huang <anson.huang@....com>,
Jacky Bai <ping.bai@....com>, Abel Vesa <abel.vesa@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Leonard Crestez <leonard.crestez@....com>
Subject: RE: [PATCH 1/3] clk: imx: imx8mm: mark sys_pll1/2 as fixed clock
Hi Shawn,
> Subject: Re: [PATCH 1/3] clk: imx: imx8mm: mark sys_pll1/2 as fixed clock
>
> On Wed, Oct 09, 2019 at 09:58:14AM +0000, Peng Fan wrote:
> > From: Peng Fan <peng.fan@....com>
> >
> > According Architecture definition guide, SYS_PLL1 is fixed at 800MHz,
> > SYS_PLL2 is fixed at 1000MHz, so let's use imx_clk_fixed to register
> > the clocks and drop code that could change the rate.
> >
> > Signed-off-by: Peng Fan <peng.fan@....com>
>
> Applied all, thanks.
I have a v2 https://patchwork.kernel.org/cover/11208131/ patch
based on Lenoard's v3
https://patchwork.kernel.org/patch/11193189/ to avoid conflicts
when you apply Lenoard's v3 patch.
It is fine you take my v1, but you will have conflicts if you take
Leonard's v3 after apply my v1.
Regards,
Peng.
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