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Message-ID: <20191025074737.GA32742@smile.fi.intel.com>
Date:   Fri, 25 Oct 2019 10:47:37 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Hans de Goede <hdegoede@...hat.com>
Cc:     "Rafael J . Wysocki" <rjw@...ysocki.net>,
        Len Brown <lenb@...nel.org>, Lee Jones <lee.jones@...aro.org>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] mfd: intel_soc_pmic_crc: Add "cht_crystal_cove_pmic"
 cell to CHT cells

On Thu, Oct 24, 2019 at 11:38:27PM +0200, Hans de Goede wrote:
> Add a "cht_crystal_cove_pmic" cell to the cells for the Cherry Trail
> variant of the Crystal Cove PMIC. Adding this cell enables / hooks-up
> the new Cherry Trail Crystal Cove PMIC OpRegion driver.
> 

The code below is fine, although same wondering about naming scheme for PWM /
GPIO.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

> Signed-off-by: Hans de Goede <hdegoede@...hat.com>
> ---
>  drivers/mfd/intel_soc_pmic_crc.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c
> index ab09b8225b76..429efa1f8e55 100644
> --- a/drivers/mfd/intel_soc_pmic_crc.c
> +++ b/drivers/mfd/intel_soc_pmic_crc.c
> @@ -88,6 +88,9 @@ static struct mfd_cell crystal_cove_cht_dev[] = {
>  		.num_resources = ARRAY_SIZE(gpio_resources),
>  		.resources = gpio_resources,
>  	},
> +	{
> +		.name = "cht_crystal_cove_pmic",
> +	},
>  	{
>  		.name = "crystal_cove_pwm",
>  	},
> -- 
> 2.23.0
> 

-- 
With Best Regards,
Andy Shevchenko


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