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Message-ID: <20191025111338.27324-1-chunyan.zhang@unisoc.com>
Date: Fri, 25 Oct 2019 19:13:33 +0800
From: Chunyan Zhang <chunyan.zhang@...soc.com>
To: Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
CC: <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Orson Zhai <orsonzhai@...il.com>,
Baolin Wang <baolin.wang7@...il.com>,
Chunyan Zhang <zhang.lyra@...il.com>,
Chunyan Zhang <chunyan.zhang@...soc.com>
Subject: [PATCH 0/5] Add clocks for Unisoc's SC9863A
Add SC9863A specific clock driver and devicetree bindings for it.
Also this patchset added support gate clock for pll which need to
wait a certain time for stable after being switched on.
Chunyan Zhang (4):
dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC
specific
dt-bindings: clk: sprd: add bindings for sc9863a clock controller
clk: sprd: Add dt-bindings include file for SC9863A
clk: sprd: add clocks support for SC9863A
Xiaolong Zhang (1):
clk: sprd: add gate for pll clocks
.../clock/{sprd.txt => sprd,sc9860-clk.txt} | 2 +-
.../bindings/clock/sprd,sc9863a-clk.txt | 59 +
drivers/clk/sprd/Kconfig | 8 +
drivers/clk/sprd/Makefile | 1 +
drivers/clk/sprd/gate.c | 19 +
drivers/clk/sprd/gate.h | 21 +-
drivers/clk/sprd/sc9863a-clk.c | 1711 +++++++++++++++++
include/dt-bindings/clock/sprd,sc9863a-clk.h | 353 ++++
8 files changed, 2171 insertions(+), 3 deletions(-)
rename Documentation/devicetree/bindings/clock/{sprd.txt => sprd,sc9860-clk.txt} (98%)
create mode 100644 Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt
create mode 100644 drivers/clk/sprd/sc9863a-clk.c
create mode 100644 include/dt-bindings/clock/sprd,sc9863a-clk.h
--
2.20.1
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