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Message-ID: <1572242984-30460-3-git-send-email-dehui.sun@mediatek.com>
Date:   Mon, 28 Oct 2019 14:09:44 +0800
From:   Dehui Sun <dehui.sun@...iatek.com>
To:     Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Matthias Brugger <matthias.bgg@...il.com>
CC:     <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <srv_heupstream@...iatek.com>, <erin.lo@...iatek.com>,
        <weiyi.lu@...iatek.com>, <dehui.sun@...iatek.com>
Subject: [PATCH v2 2/2] arm64: dts: mt8183: add systimer0 device node

Add systimer0 device node for MT8183.

Signed-off-by: Dehui Sun <dehui.sun@...iatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 7e23179..40145dc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -326,6 +326,15 @@
 			clock-names = "spi", "wrap";
 		};
 
+		systimer: timer@...17000 {
+			compatible = "mediatek,mt8183-timer",
+				     "mediatek,mt6765-timer";
+			reg = <0 0x10017000 0 0x1000>;
+			interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&topckgen CLK_TOP_CLK13M>;
+			clock-names = "clk13m";
+		};
+
 		auxadc: auxadc@...01000 {
 			compatible = "mediatek,mt8183-auxadc",
 				     "mediatek,mt8173-auxadc";
-- 
1.9.1

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