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Message-ID: <20191028115039.96555-3-jitao.shi@mediatek.com>
Date:   Mon, 28 Oct 2019 19:50:38 +0800
From:   Jitao Shi <jitao.shi@...iatek.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
CC:     <srv_heupstream@...iatek.com>, Jitao Shi <jitao.shi@...iatek.com>
Subject: [PATCH v3 2/3] arm64: dts: mt8183: add pwm0 node

Add pwm0 node to the mt8183

Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index bb0d53be6a25..2b6e010d6866 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -643,6 +643,17 @@
 			};
 		};
 
+		pwm0: pwm@...0e000 {
+			compatible = "mediatek,mt8183-disp-pwm";
+			reg = <0 0x1100e000 0 0x1000>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_LOW>;
+			power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+			#pwm-cells = <2>;
+			clocks = <&topckgen CLK_TOP_MUX_DISP_PWM>,
+					<&infracfg CLK_INFRA_DISP_PWM>;
+			clock-names = "main", "mm";
+		};
+
 		audiosys: syscon@...20000 {
 			compatible = "mediatek,mt8183-audiosys", "syscon";
 			reg = <0 0x11220000 0 0x1000>;
-- 
2.21.0

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