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Message-ID: <20191028121725.GJ16985@dragon>
Date: Mon, 28 Oct 2019 20:17:26 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Shengjiu Wang <shengjiu.wang@....com>
Cc: robh+dt@...nel.org, mark.rutland@....com, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
Anson.Huang@....com, ping.bai@....com, jun.li@....com,
leonard.crestez@....com, daniel.baluta@....com,
daniel.lezcano@...aro.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM64: imx8mm: Change compatible string for sdma
On Fri, Oct 25, 2019 at 04:39:23PM +0800, Shengjiu Wang wrote:
> SDMA in i.MX8MM should use same configuration as i.MX8MQ
> So need to change compatible string to be "fsl,imx8mq-sdma".
>
> Fixes: a05ea40eb384 ("arm64: dts: imx: Add i.mx8mm dtsi support")
> Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
Updated the subject as below and applied the patch.
arm64: dts: imx8mm: fix compatible string for sdma
Shawn
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 2139c0a9c495..6a54d2a3b19b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -394,7 +394,7 @@
> };
>
> sdma2: dma-controller@...c0000 {
> - compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
> + compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
> reg = <0x302c0000 0x10000>;
> interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>,
> @@ -405,7 +405,7 @@
> };
>
> sdma3: dma-controller@...b0000 {
> - compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
> + compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
> reg = <0x302b0000 0x10000>;
> interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>,
> @@ -741,7 +741,7 @@
> };
>
> sdma1: dma-controller@...d0000 {
> - compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
> + compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
> reg = <0x30bd0000 0x10000>;
> interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>,
> --
> 2.21.0
>
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