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Message-ID: <20191029112655.15058-9-frieder.schrempf@kontron.de>
Date: Tue, 29 Oct 2019 11:28:07 +0000
From: Schrempf Frieder <frieder.schrempf@...tron.de>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Fabio Estevam <festevam@...il.com>,
Schrempf Frieder <frieder.schrempf@...tron.de>,
Mark Rutland <mark.rutland@....com>,
NXP Linux Team <linux-imx@....com>,
"Pengutronix Kernel Team" <kernel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
"Sascha Hauer" <s.hauer@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>
CC: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: [PATCH v2 08/11] ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete
comment and fix indentation
From: Frieder Schrempf <frieder.schrempf@...tron.de>
The ECSPI1 is not used for a FRAM chip, so remove the comment.
While at it, also change some whitespaces to tabs to comply with the
indentation style of the rest of the file.
Signed-off-by: Frieder Schrempf <frieder.schrempf@...tron.de>
---
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
index d3eb21aa9014..e18a8bd239be 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
@@ -256,7 +256,6 @@
>;
};
- /* FRAM */
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
@@ -281,8 +280,8 @@
pinctrl_enet2_mdio: enet2mdiogrp {
fsl,pins = <
- MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
- MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
>;
};
@@ -295,10 +294,10 @@
pinctrl_gpio: gpiogrp {
fsl,pins = <
- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
- MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
+ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
>;
};
--
2.17.1
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