lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 30 Oct 2019 16:11:53 +0800
From:   "Ramuthevar,Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
To:     linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     broonie@...nel.org, vigneshr@...com, robh+dt@...nel.org,
        cheol.yong.kim@...el.com, qi-ming.wu@...el.com,
        "Ramuthevar,Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
Subject: [PATCH v2 0/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller 

Add support for the Cadence QSPI controller. This controller is
present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs.
This driver has been tested on the Intel LGM SoCs.

This driver does not support generic SPI and also the implementation
only supports spi-mem interface to replace the existing driver in
mtd/spi-nor/cadence-quadspi.c, the existing driver only support SPI-NOR
flash memory.

v2 changes from v1:
  Thank you Mark and Vignesh for the review comments and also shared link to develop 
cadence-quadspi driver based on spi-mem framework against removal of legacy SPI.

Mark Brown Review comments:
	If it's different versions of the same IP then everything should be in
	one driver with the optional features enabled depending on what's in a
	given system.

Vignesh review comments:
	Nope, you cannot have two drivers for the same IP (i.e Cadence QSPI)
	just to support to different types of SPI memories. This is the reason
	why spi_mem_ops was introduced.

	Please rewrite this driver over to use spi_mem_ops (instead of using
	generic SPI xfers) so that same driver supports both SPI-NOR and
	SPI-NAND flashes. Once that's done drivers/mtd/spi-nor/cadence-quadspi.c
	can be deleted.

	There are few existing examples of spi_mem_ops users in drivers/spi/
	(git grep spi_mem_ops) and materials here on how to write such a driver:
	
	[1] https://bootlin.com/blog/spi-mem-bringing-some-consistency-to-the-spi-memory-ecosystem/
	[2] https://www.youtube.com/watch?v=PkWbuLM_gmU

 

Ramuthevar Vadivel Murugan (2):
  dt-bindings: spi: Add schema for Cadence QSPI Controller driver
  spi: cadence-quadpsi: Add support for the Cadence QSPI controller

 .../devicetree/bindings/spi/cadence,qspi.yaml      |   65 +
 drivers/spi/Kconfig                                |   10 +
 drivers/spi/Makefile                               |    1 +
 drivers/spi/spi-cadence-quadspi.c                  | 1290 ++++++++++++++++++++
 drivers/spi/spi-cadence-quadspi.h                  |  272 +++++
 5 files changed, 1638 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/cadence,qspi.yaml
 create mode 100644 drivers/spi/spi-cadence-quadspi.c
 create mode 100644 drivers/spi/spi-cadence-quadspi.h

-- 
2.11.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ