linux-kernel - Re: Unexpected screen flicker during i915 initialization

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Message-ID: <87o8xy8jqh.fsf@intel.com>
Date:   Wed, 30 Oct 2019 15:07:34 +0200
From:   Jani Nikula <jani.nikula@...el.com>
To:     Chris Chiu <chiu@...lessm.com>, joonas.lahtinen@...ux.intel.com,
        rodrigo.vivi@...el.com, David Airlie <airlied@...ux.ie>,
        daniel@...ll.ch, intel-gfx@...ts.freedesktop.org,
        dri-devel <dri-devel@...ts.freedesktop.org>
Cc:     Linux Kernel <linux-kernel@...r.kernel.org>,
        ville.syrjala@...ux.intel.com
Subject: Re: Unexpected screen flicker during i915 initialization

On Wed, 30 Oct 2019, Chris Chiu <chiu@...lessm.com> wrote:
> Hi guys,
>     We have 2 laptops, ASUS Z406MA and Acer TravelMate B118, both
> powered by the same Intel N5000 GemniLake CPU. On the Acer laptop, the
> panel will blink once during boot which never happens on the ASUS
> laptop. It caught my attention and I find the difference between them
> but I need help for more information,
>
>     The major difference happens in bxt_sanitize_cdclk() on the
> following condition check.
>         if (cdctl == expected)
>                 /* All well; nothing to sanitize */
>                 return;
>
>     On the problematic Acer laptop, the value of cdctl is 0x27a while
> the same cdctl is 0x278 on ASUS machine. Due to the 0x27a is not equal
> to the expected value 0x278 so it needs to be sanitized by assigning
> -1 to  dev_priv->cdclk.hw.vco. Then the consequent bxt_set_cdclk()
> will force the full PLL disable and enable. And that's the flicker
> (blink) we observed during boot.
>
>     Although I can't find the definition about the BIT(2) of CDCLK_CTL
> which cause this difference. Can anyone suggest what exactly the
> problem is and how should we deal with it? Thanks.

The 11 least significant bits of that register are the cdclk frequency
in 10.1 fixed point format. Apparently the Acer BIOS or GOP has a
different idea of how to calculate the value from what i915 and the Asus
think.

To handle this in i915, we'd need to allow some deviation from the
expected value, and only switch to use our value at the next modeset. We
do need the sanitization though, because sometimes there have been
completely bogus values to begin with.

Please file a bug over at [1] and reference this thread.

BR,
Jani.


[1] https://bugs.freedesktop.org/enter_bug.cgi?product=DRI&component=DRM/Intel


-- 
Jani Nikula, Intel Open Source Graphics Center