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Message-ID: <82D7661F83C1A047AF7DC287873BF1E173835B1A@SHSMSX104.ccr.corp.intel.com>
Date: Wed, 30 Oct 2019 04:06:36 +0000
From: "Kang, Luwei" <luwei.kang@...el.com>
To: Peter Zijlstra <peterz@...radead.org>
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Subject: RE: [PATCH v1 3/8] KVM: x86: Allocate performance counter for PEBS
event
> > static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
> > unsigned config, bool exclude_user,
> > bool exclude_kernel, bool intr,
> > - bool in_tx, bool in_tx_cp)
> > + bool in_tx, bool in_tx_cp, bool pebs)
> > {
> > struct perf_event *event;
> > struct perf_event_attr attr = {
> > @@ -111,9 +111,12 @@ static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
> > .exclude_user = exclude_user,
> > .exclude_kernel = exclude_kernel,
> > .config = config,
> > + .precise_ip = pebs ? 1 : 0,
> > + .aux_output = pebs ? 1 : 0,
>
> srsly?
Hi Peter,
Thanks for review. For aux_output, I think it should be set 1 when the guest wants to enabled PEBS by Intel PT.
For precise_ip, it is the precise level in perf and set by perf command line in KVM guest, this may not reflect the accurate value (can be 0~3) here. Here set to 1 is used to allocate a counter for PEBS event and set the MSR_IA32_PEBS_ENABLE register. For PMU virtualization, KVM will trap the guest's write operation to PMU registers and allocate/free event counter from host if a counter enable/disable in guest. We can't always deduce the exact parameter of perf command line from the value of the guest writers to the register.
Thanks,
Luwei Kang
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